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D-DRISA-3 (lab): threshold, Kleene and Bag on the shipped carry words (stacked on #1955) - #1956
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Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
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lib.rs: both sides added a line at the top (pub mod alu; the AtomicU64 import from #1955); kept both. Board indexes regenerated. 21/21 tests. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
Stacked on #1955 (its base is the D-DRISA-1 branch). Merge #1955 first, then retarget this PR to
main. Like #1955, it is a lab and board change only: no production code, no new ndarray word, no public type, and no import ofU24x5orAbacus. Please don't merge automatically. It is stage 3 of EXO-153 and follows P3-5 (#1954).What was tested
src/alu.rsuses onlyndarray::simd::{half_add_mask, full_add_mask, U8x64}. Each input is a DR-aligned mask plane, with a presence plane for absent rows. Every shape is checked per row against a scalar oracle:U8x64byte-counter arm both match the oracle on every row.All 19 tests in the crate pass. Seven disable runs, all red: the comparator, presence, Kleene overlap, Bag weight, carry column, and tail. The tail guard only carries weight once the dirty-presence test exists. Before that test was added, presence alone zeroed the tail.
Result
The carry words are an exact vocabulary for all three shapes, and slower than native words in every shape, in ns per 64 rows:
U8x64U8x64U8x64U8x64U8x64U8x64Measured on one host (AVX-512, no VNNI) with the default x86-64 target. I did not record which facade backend that build selected. A branchless ripple was also tried and was not faster.
Likely cause (HYPOTHESIS): a carry-word call covers one
u64(64 rows), while a singleU8x64add also covers 64 rows. No wide carry word exists to test this.Proposed ruling (memo D-DRISA-M6): lower threshold, Kleene and Bag to byte counters by default. Keep the carry formulation and its oracle as the semantic reference. Not measured: counts above 255, folds that keep planes for later arithmetic, other ISA tiers.
Board: entry
entries/2026-11-04-d-drisa-3-alu-semantics.md, the STATUS_BOARD row D-DRISA-3-LAB, the memo checklist, and the regenerated index.Generated by Claude Code