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docs(D-DRISA-0): remote DR register / Abakus ALU / async cognitive shader staged architecture - #1953
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November 4, 2026 00:58
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Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAqKMNZqKXSaeb9g2ypywF
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D-DRISA-0: DR as an async data-local register contract, Abakus as optional ALU
Architecture-only / review draft. No executable remote server, ISA/opcode, networking, public ABI, new coordinate map or runtime behavior change. No automatic merge. This adds an independently falsifiable research direction to merged #1949 (D-DRAM), #1950 (D-GLOBAL-WHERE P2) and #1951 (P3 census). It does not replace their ownership decisions or claim their lab numbers demonstrate remote zero-copy.
Operator hypothesis
Instead of a replacement hash table or default gathered value cache, expose sealed DR coordinates and witnessed masks as a logical register-address space. Use ClassView/DT64 for field/method identity; Quack/RelAlg/R2IL/mask-risc for existing program vocabulary; ndarray's shipped
half_add_mask/full_add_maskas bit-sliced ALU words where needed. Dispatch compact typed instructions asynchronously to the machine that owns canonical SoA and return scalar/mask/candidate results. No payload rows need be transported by default.Source-backed reuse:
dt64::dr::{MapTable,LocalMap,Frame}: identity-only coordinate owner;LocalMap::globalsmust not become physical source pointers.mask-risc::Operand::{Plane,Scratch},PlanesandLaneRef::Strided: local borrowed slots with caller-owned memory;exec.rsdelegates to ndarray facade.MethodBinding/signature and R2IL dialect already express local typed operations; a remote driver needs authorization/lease/version/completion, not a new interpreter.U24x5andAbacus<BITS>are examples-only. The shipped half/full adder words are the supported ALU base.gather_lanevalues; not proof of address-only locator memoization.head_frameis a derived semantic lane (producer gate open), not a source-location receipt.Critical zero-copy distinction
Local canonical BORROW: yes, where the source lease permits. No intermediate payload transport: the measured hypothesis. Network/RDMA zero-copy: not claimed. Lance row-mask ingress remains a costed copy, D4 single
_rowidauthority remains blocked. Arrow C Data Interface is same-process, while Arrow Flight is merely a possible future transport comparator.Contents (seven files; all docs/board)
.claude/plans/d-drisa-remote-register-shader-v1.md: ownership, register/descriptor sketch, source lease, remote state/cancellation, ALU, 7 fair cost baselines, security/epistemic rules, source literature..claude/plans/d-drisa-staged-pr-charter-v1.md: PR0–PR8 with predecessor/owner gates, precise fixtures, acceptance and refusal boundaries; no future implementation claimed as existing..claude/plans/d-drisa-falsifier-matrix-v1.md: 57 unexecuted pre-registered falsifiers R1–16 / A1–8 / N1–14 / C1–10 / P1–9, independent oracles and disable controls..claude/board/entries/2026-11-04-d-drisa-0-remote-register-contract.md: permanent board evidence/owner map.5–7.
.claude/board/STATUS_BOARD.md,INTEGRATION_PLANS.mdand generatedentries/README.mdindex.Staged PR release gates
Coordination
Requested review: Does existing ownership of frame, method, source lease, result mask and async completion permit a safe descriptor-only contract without a new identity table or copied value cache? Which exact stages may remain lab, and which require named operator or security admission? No implementation or merge requested.