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D-RMAP-2 §5a-AMX: the tile arm measured on the AMX tier - #1626

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AdaWorldAPI merged 2 commits into
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ccr-08f48cec-lbv9l4-amx
Oct 20, 2026
Merged

AdaWorldAPI merged 2 commits into
mainfrom
ccr-08f48cec-lbv9l4-amx

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Lab probe only, nothing admitted to production. Documentation and board only; no code change.

§5a measured the D-RMAP-2 tile arm on a host with no tile hardware, so its BF16 numbers came from ndarray's F32x16 polyfill. This adds the same measurement on a host where ndarray reports AMX TDPBF16PS.

Method. Same code, fixtures and command as §5a, at main 8b570ed3. CPU flags read before and after the runs (amx_bf16, amx_tile, amx_int8, avx512_bf16, avx512f; 4-vCPU shared VM), unchanged. Five runs of cargo run --release --example tile_gemm_cost, each the example's medians of 7; §5a-AMX reports the median of the five and the range. cargo test --release --test tile_gemm passes on the host, and its BF16 assertions go through the packed entry that dispatches to AMX.

What it shows.

  • Exactness holds on AMX: walk counts equal the oracle exactly, and count > 0 equals Boolean composition.
  • Walk counts: AMX A·A 58–67 µs against popcount 128–164 µs, about 2.2–2.5×, staging (132–470 µs per map) excluded. By arithmetic from the medians, not measured: staging is repaid after about 1.4–6.4 products on one staged map.
  • Boolean composition and triangles: the bit arm still wins, by 6–60× and with 1.9–36 µs against 41–323 µs.
  • So §5a's polyfill finding, that the bit arm wins every cell, does not hold on the AMX tier for walk counts. It still holds for existence questions.

Not covered. VDPBF16PS-only hosts, blocked tiles above one focus, the GraphBLAS arm. The row-major entry took 5.6–6.1 ms here against about 19 ms on the §5a host; that path does not use AMX and the difference was not investigated. The example's bf16_bytes column reads 262 144 on this commit; the corrected 384 KiB is in #1625.

Board. STATUS_BOARD D-RMAP-2 row updated; new entry D-RMAP-2-AMX; entries index regenerated (--check passes); supersession index unchanged; append-only gate passes.


Generated by Claude Code

Second host for §5a, same code and fixtures at main 8b570ed. ndarray
reports AMX TDPBF16PS; five runs of tile_gemm_cost (each medians of 7),
CPU flags recorded before and after, exactness tests pass with the
packed entry on AMX.

- Walk counts: AMX A·A 58-67 µs vs popcount 128-164 µs (2.2-2.5x),
  staging excluded; staging repaid after about 1.4-6.4 products
  (arithmetic from the medians).
- Boolean composition and triangles: the bit arm still wins.
- Row-major entry 5.6-6.1 ms here vs about 19 ms on the §5a host, not
  investigated.

Board: STATUS_BOARD D-RMAP-2 row, new entry D-RMAP-2-AMX, index
regenerated. Lab only.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01VyWZYKycy6MoYDxHRVnV5K
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@AdaWorldAPI
AdaWorldAPI marked this pull request as ready for review October 20, 2026 09:09
Conflict only in the generated .claude/board/entries/README.md;
regenerated with entries_index.py --write (382 rows, --check passes).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01VyWZYKycy6MoYDxHRVnV5K
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📝 Code Review ✅ Completed 2026-10-20T09:10:58.290321Z 69e5003 Draft marked ready
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@AdaWorldAPI
AdaWorldAPI merged commit bc8012d into main Oct 20, 2026
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AdaWorldAPI pushed a commit that referenced this pull request Oct 20, 2026
Arc entries for #1621-#1626 and a LATEST_STATE section; four ISSUES rows
that each gather one blocker's several names (admission, recursion
driver, retraction provenance, DurableRef/ThoughtCommitId); a correction
for the stale D-RMAP-2 "not run" index line; the Haiku run ledger; and
D-RMAP-2 §5a-AMX re-measured on a second AMX host.

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01VncKoyG6JkpsoqhqTGTv3f
AdaWorldAPI added a commit that referenced this pull request Oct 20, 2026
board: catch up #1621–#1626, one row per duplicated blocker, D-RMAP-2 AMX re-run
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