You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
{{ message }}
Repository navigation
Commit bc8012d
Browse filesBrowse the repository at this point in the historyBrowse files
Copy file name to clipboardExpand all lines: .claude/board/STATUS_BOARD.md
+1-1Lines changed: 1 addition & 1 deletion
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -52,7 +52,7 @@ These PRs merged with no board rows. Every row below is a PROPOSAL (documents an
52
52
| D-RPR-2 | premise revision with selective retraction | BLOCKED on D-TGA-3 (per-derived-cell provenance) | stale-premise refusal only, until then |
53
53
| D-RPR-3 | MeTTa-facing parity of a chain's answers | BLOCKED on D-ASM-4 (not authorized) | — |
54
54
| D-MPS-8 | native join over a versioned relationship table: R and S laid out by `y` slot, leapfrog intersection as one mask-risc `And`, per-side generations and reseal, per-thought filter planes (`mork-pathmap-schnellverschluss-v1.md` §7b; `crates/mork-pathmap-probe/src/join.rs`) | MEASURED, probe only; not admitted (D-RMAP-1 BIND membrane review) | 8 join tests + native arms in the differential suite vs the oracle; 7 guards disable-verified; cyclic bodies open |
55
-
| D-RMAP-2 | context-declaration reuse and GraphBLAS/BF16 tile probe (`d-rmap-2-context-tile-algebra-probe-v1.md`) | LAB ONLY, not admitted to production; PARTIAL: one cell MEASURED (§5a, polyfill tier only); tile tiers and GraphBLAS arm not run | arms 1–5 in the plan; 297× (D-GTM-0j) is not evidence |
55
+
| D-RMAP-2 | context-declaration reuse and GraphBLAS/BF16 tile probe (`d-rmap-2-context-tile-algebra-probe-v1.md`) | LAB ONLY, not admitted to production; PARTIAL: §5a MEASURED on the polyfill tier and on the AMX tile tier (§5a-AMX); `VDPBF16PS`-only tier and GraphBLAS arm not run | arms 1–5 in the plan; 297× (D-GTM-0j) is not evidence |
56
56
| D-SRAM-0 | inventory Soufflé AST/ast2ram/RAM passes against D-ASM/D-RA/D-TGA owners | Queued | evidence per mapped pass; no code imported |
57
57
| D-SRAM-1 | bound AST → RAM-like schedule for pure conjunctive selection | Queued | same answers and read sets on hand-built fixtures; unsupported ops typed-refused |
58
58
| D-SRAM-2 | cold optimizer rewrites (SCC/strata, magic sets, ordering, dedup) | Queued (research until D-ASM AST placement and D-RA-2) | optimized == unoptimized == oracle; rewrite off removes only the plan shape; disabling a semantic guard fails |
# D-RMAP-2-AMX: the tile arm on the AMX tier (2026-10-20)
2
+
3
+
**Status:** MEASURED, probe only, one host, five runs. Record: `.claude/plans/d-rmap-2-context-tile-algebra-probe-v1.md` §5a-AMX. Code unchanged: `crates/mork-pathmap-probe/src/tile_gemm.rs`.
4
+
5
+
## Measured
6
+
7
+
- Host reports `AMX TDPBF16PS` (`amx_bf16`, `amx_tile`, `avx512_bf16`; 4 vCPU). The exactness tests pass with the packed entry on AMX.
8
+
- Walk counts: AMX `A·A` 58–67 µs against popcount 128–164 µs (about 2.2–2.5×), staging (132–470 µs) excluded; by arithmetic, staging is repaid after about 1.4–6.4 products on one staged map.
9
+
- Boolean composition and triangles: the bit arm still wins (6–60× and 1.9–36 µs against 41–323 µs).
10
+
11
+
## Open
12
+
13
+
-`VDPBF16PS`-only hosts; blocked tiles above one focus; the GraphBLAS arm; why the row-major entry is 5.6–6.1 ms here against about 19 ms on the §5a host.
Copy file name to clipboardExpand all lines: .claude/plans/d-rmap-2-context-tile-algebra-probe-v1.md
+23Lines changed: 23 additions & 0 deletions
Display the source diff
Display the rich diff
Original file line number
Diff line number
Diff line change
@@ -112,6 +112,29 @@ Report: total bound cost, sorted-index creation/maintenance, native scan time, r
112
112
-**The 19 ms is the polyfill's shape, not GEMM's.**`ndarray::simd_ops::bf16_tile_gemm_16x16` allocates two decode buffers per call, then one strided B-column buffer and one horizontal reduce per output element: about 257 heap allocations per 16 × 16 call, 65 000 per 256 × 256 product. The packed entry on this tier also unpacks and allocates per call. Recorded as `ISS-BF16-POLYFILL-PER-ELEMENT-ALLOC`; the row-major entry is no faster, so the unpack is not the cost.
113
113
-**Two conclusions, kept apart.** (1) *Measured:* on this host's F32x16 polyfill tier, the bit arm wins every cell, and BF16 is exact. (2) *Not measured:* nothing here says anything about BF16 or AMX tile hardware performance. The polyfill's cost is dominated by allocation, so it is not even a lower bound on what `TDPBF16PS` or `VDPBF16PS` would cost. No layout decision may cite (1) as evidence about (2).
114
114
-**Not measured:** AMX and `VDPBF16PS` hosts; dense relations above one focus (blocked 256 × 256 tiles); weighted or evidence-bearing relations, which §3 excludes anyway.
115
+
-*Update 2026-10-20:* the AMX tile tier is now measured on a second host (§5a-AMX). `VDPBF16PS`-only hosts, blocked tiles above one focus and weighted relations are still not measured.
116
+
117
+
### 5a-AMX. Second host: the AMX tile tier (2026-10-20)
118
+
119
+
> **Status: MEASURED, probe only, one host, five runs.** Same code, same fixtures, same command as §5a, at `main``8b570ed3`. `bf16_tile_gemm_tier()` reports `AMX TDPBF16PS`, so ndarray's detection obtained tile permission on this host. `/proc/cpuinfo`: `amx_bf16`, `amx_tile`, `amx_int8`, `avx512_bf16`, `avx512f`; `Intel(R) Xeon(R) Processor @ 2.10GHz`, 4 vCPU, shared VM. The CPU flags were read before and after the runs and did not change.
120
+
121
+
Each run is the example's medians of 7; the table gives the median of the five runs and, in brackets, their range. µs throughout.
122
+
123
+
| Map | bit compose | bit walk counts (popcount) | bit triangles | BF16 stage | BF16 `A·A` packed (AMX) |`A·A` row-major entry | threshold | BF16 triangles |
-**Exactness holds on the AMX tier.**`cargo test --release --test tile_gemm` passes on this host (4 tests). Its BF16 assertions call `Bf16Staged::square`, the packed entry that dispatches to AMX here, so walk counts equal the oracle exactly and `count > 0` equals Boolean composition on the tile hardware, not only on the polyfill.
131
+
-**Walk counts: the AMX product beats popcount, staging excluded.** Packed `A·A` takes 58–67 µs against 128–164 µs for popcount counts, about 2.2–2.5× on all four maps. Staging (132–470 µs, once per map) is not in that figure. Arithmetic from the medians, not measured: staging is repaid after about 1.4, 2.4, 6.4 and 2.1 products on the same staged map (1 %, 10 %, 50 %, hubs).
132
+
-**Boolean composition: the bit arm still wins by 6–60×.** Getting `C = A ∘ A` from the GEMM needs the product plus the threshold (about 116–164 µs); the bit composition takes 2.0–26.9 µs. The threshold alone costs more than the bit composition on every map.
133
+
-**Triangles: the bit arm wins.** 1.9–36 µs against 41–323 µs for the BF16 path.
134
+
-**So the §5a reading changes in one place.** On the polyfill tier the bit arm won every cell. On the AMX tier it still wins Boolean composition and triangles, but the tile product wins walk counts once a staged map is reused. That fits §3's split: existence questions belong to the bit arm, multiplicities may belong to the tile arm, and the crossover is a reuse count, not a single-product comparison.
135
+
-**The row-major entry took 5.6–6.1 ms here, against about 19 ms on the §5a host.** It does not go through the packed AMX path. Why it is faster on this host was not investigated; this number says nothing about AMX.
136
+
-**Not reported here:** the example's `bf16_bytes` column reads 262 144 on this commit; the corrected total is 384 KiB (#1625).
137
+
-**Noise:** a shared 4-vCPU VM. Most cells stay within about 30 % of their median across runs; the 50 % map's fourth run was slow in every column (row-major 9.1 ms).
115
138
116
139
## 5b. Tile GEMM is a consumer of prepared relationships, not a gather solution (operator, 2026-10-20)
0 commit comments