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enhance: add batch validity APIs to IdMap - #1858
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Signed-off-by: marcelo-cjl <marcelo.chen@zilliz.com>
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| // non-zero. x86 and AArch64 use their baseline vector ISA, with AVX2 selected | ||
| // when the including translation unit is compiled for it. | ||
| inline void | ||
| AndPackedBytes(uint8_t* target, const uint8_t* source, size_t byte_count, unsigned shift) { |
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I would prefer to have distinct versions for each arch, because it makes the mode way more clear, despite being longer
#if defined(__BYTE_ORDER__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ && defined(__AVX2__)
// AVX2 version
inline void
AndPackedBytes(uint8_t* target, const uint8_t* source, size_t byte_count, unsigned shift) {...}
#elif #if defined(__BYTE_ORDER__) && __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ && defined(__SSE2__)
// SSE2 version
inline void
AndPackedBytes(uint8_t* target, const uint8_t* source, size_t byte_count, unsigned shift) {...}
...
// other versions
...
#else
// baseline version here
...
#endifThere was a problem hiding this comment.
got it. I'll make the relevant changes along with it next time when there are related updates.
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/lgtm |
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[APPROVALNOTIFIER] This PR is APPROVED This pull-request has been approved by: alexanderguzhva, marcelo-cjl The full list of commands accepted by this bot can be found here. The pull request process is described here DetailsNeeds approval from an approver in each of these files:
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issue: #1860 |
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/kind improvement |
Summary
IdMap.Performance
Kernel microbenchmark over 4,194,304 bits per invocation (median of 9 retained rounds; non-byte-aligned source/target):
These are cache-resident kernel measurements rather than end-to-end Milvus latency.
Test Plan
make WITH_UT=True BUILD_DIR=build/main/cpu-ut CONAN_INSTALL_FLAGS='--build=missing --build=liburing'build/main/cpu-ut/Release/tests/ut/knowhere_tests '[nullable][id_map]'(7 test cases, 1137 assertions)pre-commit run --all-files --show-diff-on-failure