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Do not require <asm/hwcap.h> for aarch64 CPU feature detection - #11915

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Frauschi:aarch64_hwcap_no_kernel_headers
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Frauschi wants to merge 1 commit into
wolfSSL:masterfrom
Frauschi:aarch64_hwcap_no_kernel_headers

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The aarch64 Linux CPU feature detection in cpuid.c included the kernel header <asm/hwcap.h>. On musl distributions such as Alpine that header only exists with linux-headers installed, so --enable-armasm and --enable-all-asm failed to build on aarch64 with fatal error: asm/hwcap.h: No such file or directory.

  • Take the HWCAP_* bits from <sys/auxv.h> and define any the C library lacks, matching the 32-bit ARM path in the same file.
  • The fallback values are the kernel's arm64 uapi ones. musl has no HWCAP2_SME, so SME is now detected there.
  • With every bit defined, the HWCAP_ASIMDRDM, HWCAP_SVE and HWCAP2_SME guards in cpuid_set_flags are dropped.
  • fil-c.yml: the comment explaining why the aarch64 Fil-C legs build with --disable-asm blamed the missing header. With this change that build compiles, but Fil-C panics on the inline assembly of sp_div_word in sp_int.c, so the comment now says that. No legs change.

The aarch64 Linux path in cpuid.c included the kernel header
<asm/hwcap.h> for the HWCAP_* bits. On musl distributions such as Alpine
that header only exists with the linux-headers package installed, so
--enable-armasm and --enable-all-asm failed on aarch64 while x86 builds
needed nothing extra.

Take the bits from <sys/auxv.h> and define any the C library lacks, the
same way the 32-bit ARM path already does. musl does not define
HWCAP2_SME, so without the fallback SME would never be detected there.
With every bit now defined, the HWCAP_ASIMDRDM, HWCAP_SVE and HWCAP2_SME
guards around their checks are dropped.

The Fil-C workflow gave the missing header as the reason its aarch64
legs build with --disable-asm. With this change the aarch64 asm build
compiles under Fil-C, but sp_div_word's inline assembly panics at run
time: v0.684 has no aarch64 inline assembly, and v0.687 rejects the
shifted register operands in sp_div_word ("x5, lsr 1" and twice
"%[hi], lsl 32"). The comment now names sp_div_word instead.
@Frauschi Frauschi self-assigned this Oct 28, 2026
Copilot AI balanced review requested due to automatic review settings October 28, 2026 14:45

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🟢 Approval recommended

No active review issues block the aarch64 CPU feature-detection update.

No open issues 🎉

What changed in this PR

Removes the Linux kernel header dependency from aarch64 CPU feature detection, allowing assembly-enabled wolfSSL builds on musl systems without linux-headers.

Changes:

  • Uses <sys/auxv.h> with fallback capability definitions instead of <asm/hwcap.h>.
  • Removes redundant capability guards, enabling SME detection where libc lacks its definition.
  • Updates the Fil-C workflow comment to explain the remaining inline-assembly limitation; build configurations are unchanged.
File Description
wolfcrypt/​src/​cpuid.c Adds fallback capability constants and simplifies aarch64 feature detection.
.github/​workflows/​fil-c.yml Corrects the comment explaining why aarch64 assembly remains disabled.

Review effort: Balanced

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github-actions Bot commented Oct 28, 2026 •

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@Frauschi

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Jenkins retest this please

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2 participants