SRAM22 is a configurable single-port SRAM generator for SKY130, developed at UC Berkeley.
Install with a current stable Rust toolchain and Cargo:
cargo install --git https://github.com/ucb-substrate/sram22 --locked sram22Save this as sram22.toml:
[[sram]]
num_words = 64
data_width = 32
mux_ratio = 4
write_size = 8
# Optional, with commercial features: pex_level = "rcc"Then run:
sram22SRAM22 writes GDS, LEF, SPICE, behavioral Verilog, and Liberty timing files to
build/sram22_64x32m4w8/ beside the configuration file. Add more [[sram]] blocks
to generate a batch. Each macro gets its own directory under build/, or under
the directory selected with --output-dir <path>. A single configuration without
the [[sram]] header is also accepted.
-c, --config <CONFIG> TOML file (default: sram22.toml)
-o, --output-dir <OUTPUT_DIR> Output directory
-p, --parallel <PARALLEL> Maximum concurrent macros (default: no limit)
-h, --help Show available options
-V, --version Show version
With the BWRC manifest, --liberate selects Liberate MX characterization;
--drc and --lvs run Calibre verification. Setting pex_level to r, c, rc,
or rcc runs extraction for that macro; it is ignored without commercial features.
--all enables DRC and LVS but retains interpolated timing unless --liberate
is also supplied. Liberate uses the extracted netlist when pex_level is set.
By default, SRAM22 generates TT, SS, and FF Liberty files from an interpolation
model. Its timing data supports write_size = 8, word widths from 8 to 128 bits,
and depths of 64, 128, 256, 512, 1024, or 2048 words. Both mux ratios are supported
except 64 words with mux ratio 8, which has too few rows. Other configurations
require additional timing data or a BWRC build with --liberate.
See the interpolation model for its assumptions.
Liberty filenames include a corner suffix, such as
sram22_64x32m4w8_tt_025C_1v80.lib, with SS ss_100C_1v60 and FF ff_n40C_1v95.
In an ngspice testbench, load the device-model library from your
SKY130 PDK and the generated circuit
netlist. Select the process corner on the .lib line and provide power supplies,
stimuli, and temperature:
.lib "/path/to/skywater-pdk/libraries/sky130_fd_pr/latest/models/sky130.lib.spice" tt
.include "sram22_64x32m4w8.spice"
.temp 25
Load the model library once when simulating several macros together. For SRAM22's
Rust simulation testbenches, set SKY130_OPEN_PDK_ROOT to the open PDK root:
export SKY130_OPEN_PDK_ROOT=/path/to/skywater-pdkRows = num_words / mux_ratio; columns = data_width * mux_ratio.
Valid configurations require a positive write_size,
a power-of-two num_words, a mux ratio of 4 or 8, a data width divisible by write_size,
at least 16 rows, and at least 16 columns. Address width is log2(num_words);
write-mask width is data_width / write_size.
With write_size == data_width, wmask is a scalar whole-word write mask. Drive
it high to allow writes.
See the documentation for the interface and integration
outlines, and the published macro catalog
for existing layouts and timing libraries. Published GDS files are compressed;
run the catalog's unzip.sh or decompress individual .gds.gz files.
Use a checkout to modify SRAM22 or install a fork. Substitute your fork's URL:
git clone https://github.com/ucb-substrate/sram22.git
cd sram22
cargo install --path . --lockedCommercial characterization and Calibre verification require the licensed tools,
commercial PDK, and access to the BWRC Git repositories. Configure SSH access and
add this to ~/.cargo/config.toml:
[net]
git-fetch-with-cli = trueSelect the commercial manifest:
git clone https://github.com/ucb-substrate/sram22.git
cd sram22
cp Cargo.bwrc.toml Cargo.toml
make installSet the commercial PDK root when running the BWRC build:
export SKY130_COMMERCIAL_PDK_ROOT=/path/to/commercial/sky130Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you shall be licensed under the BSD 3-Clause license, without any additional terms or conditions. Vendored third-party files retain their own notices and licenses; see tech/sky130 for provenance.