master_candidate: big update flow, new dashboard and various regression fixes

[yanicasa]

TLDR: You can see status of this PR : NEW DASHBOARD

VARIOUS FIXES TO CLEAN REGRESSION

Fixes found while bringing up a full regression on every target. Each commit is independent and touches no flow file (flows/, .gitlab-ci.yml, cook.py), so they can be reviewed and reverted one by one.

RTL

• Fix X propagation on unassigned YPB and cache signals (cva6_obi_adapter_subsystem, zcmt_decoder).
• Pair the RVFI physical address with its own access: the store buffer and the LSU reported the address of another access on RVFI.
• Align the load byte enable with its own physical address (load_unit).
• Add an optional FIFO tracking the stores in flight: new parameter in config_pkg/build_config_pkg, set in every rtl_cfg_pkg.sv.

Verification

• Resolve the atomics in the OBI slave sequence: LR/SC (with a reservation) and the AMOs are resolved in the sequence, which owns the memory; the OBI agent carries atop but does not act on it.
• Check the trap against the CSRs of the privilege it was taken in: a trap delegated through medeleg vectors to stvec and writes sepc/scause.
• Make the PMP tests work on RV64 as well as RV32.
• Fix the rv64 virtual memory testlist.
• Let Dhrystone take its number of runs from the command line (#ifndef NUMBER_OF_RUNS).

Targets

• Declare cv32a60x_no_zcmt_axi as an AXI target: its testbench_cfg.yml said obi while its RTL is built for AXI.
• Re-add the cv64 spike.yaml configuration files deleted by 67625b2, and use // comments in the Flist headers, which the filelist readers do not skip when written with #.
• Enable Zifencei on the cv32a60x variants.

FPGA bootloader

• Build the FPGA bootloader with GCC 14 and later: GCC 14 made -Wint-conversion and -Wimplicit-function-declaration errors by default. Two pointers passed to print_uart_int(uint32_t) now go through print_uart_addr() (the 32-bit print also truncated them on RV64), and sd_copy_mmc() is declared for the Agilex board.

Documentation

• Fix the reST markup the user manual build reports: short underlines, unclosed inline literals, pseudocode written as a
  paragraph.

BIG UPDATE OF FLOW

The GitLab pipeline becomes a single ./cook.py full-regression job. bThe job graph, the target matrix and the licence pools live in Python and replay on a workstation with the same command; the CI only provides the machine, the environment and the publication of the dashboard.

Commits

1. Report recipe results through a shared report object. Every recipe writes a cook_report.yml (verdict, metrics, KPIs, environment vs. test failure) through RecipeReport, and runs its tools through run_cmd. The target configuration is read through one set of helpers (target_config, rtl_config) instead of a dozen inline parsers. Also: per-run simulation timeout and cycle budget, the same test run twice on one design, Spike kept off the ISAs it does not support, benchmark iteration count recorded in the manifest, cook.py refusing to run outside the root of its checkout.
2. Repair hwconfig-forge. It forges a complete config/target/<new>/ that can be passed to -t.
3. Run the TestHarness on the four simulators: VCS, Questa and Xcelium next to Verilator. (Derivated form @AlexChenIC verilator recipes)
4. Apply patches on the Git submodules from the dependency recipe, with the patch working around the atomic synchronizer race of the AXI agent in core-v-verif.
5. Drive the FPGA flows from cook.py: bootloader, Vivado and Quartus build and programming, Linux boot check on the board console. Adds Flist.cva6_fpga / Flist.cva6_altera to every target.
6. Synthesise a target on the GTECH cells (dc-shell-synth --gtech): no PDK needed, checks cell and register counts and fails on any latch. Adds Flist.cva6_synth to every target.
7. Build the documentation from a recipe instead of make (docs-build): the RISC-V and design specifications per target with AsciiDoctor, the user manual with Sphinx. --readthedoc prepares docs/ for ReadTheDocs, which runs Sphinx itself. Replaces docs/Makefile, build.mk and docs/scripts/.
8. Merge the job reports into an HTML dashboard (merge-reports, report-html).
9. Run the whole regression from a cook.py macro (full-regression) and switch .gitlab-ci.yml to it; remove the
   legacy report scripts. The dashboard shows the TestHarness, FPGA, GTECH and documentation jobs, the configuration of each target and its published specifications.
10. Re-measure the benchmark baselines, GTECH counts included.
11. Document the flows: flows/README.md (recipe reference), QUICKSTART.md, CONTRIBUTING.md (conventions, report and helpers), CONTINUOUS_INTEGRATION.md (reports, gating, the macro, GitLab and GitHub pipelines).