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qwen38: drafted-plan headroom counts the stage card's reserves - #793
Conversation
plan_mtp_with and plan_mtp_with_slots summed the target card's terms without its named reserves, so the single-card headroom ran high by the activation-forms reserve on an integrated card. The sum is CardTotals::bytes plus the draft's reserve, and the gate's identity is T.headroom - R.
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Verdict: CLEAN: Both drafted planners count named reserves and check the addition for overflow.
Non-blocking
⚠ Complete the GPU witness: crates/gpu-gates/src/bin/gate_qwen4exp_mtp.rs:6183. The fixture run deferred (pg), so it did not execute this changed assertion. Supply real-tier output with both commit hashes and the model identity. Use a card with nonzero named reserves to exercise the changed equation.
Checked
- Duplicates: the 2 new tests exercise named-reserve headroom and addition overflow. Dryer reported no pairs in
crates/model. Both planners reuseCardTotals::bytes(). - Complexity: crapper reported no changed function crossing its thresholds. The production changes add checked arithmetic without new branches.
- Silent failure: both additions return
CardBytesPastU64with the card name on overflow. Tiered plans retain their existing reserve accounting. - Tests: static mutation review only; tests were not executed here. Omitting reserves at crates/model/src/arch/qwen35moe/place.rs:848 or its multi-slot counterpart fails the headroom assertion. Replacing
checked_addat line 849 or its counterpart with saturation fails the overflow assertion. Both tests cover 1 and 2 slots. Flipping the gate equality makesfitfalse when(pg)runs. - Gates: the identity includes named reserves through the target card's headroom. No band, tolerance, threshold or clause was removed or relaxed.
- Escape catalog: C1–C4 do not match. The diff changes placement and gate code, with no decode or prefill work added.
Notes
Dryer excluded crates/gpu-gates; the changed assertion was checked manually.
Card check: needs-gpu. This pull request changes crates/gpu-gates/src/bin/gate_qwen4exp_mtp.rs and carries no gate run on a card (CONTRIBUTING's evidence list); a maintainer adds gpu-verified after one.
🔨 Shingler, bloomery's review bot: approves a clean pull request and requests changes on a must-fix (how it works)
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The review is done and the contribution check passed, so I'm merging this. |
이 PR은 드래프트 계획의 카드 headroom 계산에서 카드의 이름 붙은 reserve가 빠지던 문제를 고칩니다.
What and why
plan_mtp_withandplan_mtp_with_slotsincrates/model/src/arch/qwen35moe/place.rsadded up the target card's terms from a hand-written list. The list left out the card's named reserves, so on a card that has one (for example the activation forms reserve) the drafted plan's headroom read too high.Both functions now take the total as the card's own byte count plus the draft's reserve, so the bound and the headroom count the same terms. The sum uses
checked_add. A total pastu64returnsPlacementError::CardBytesPastU64with the card's name, where a saturating sum would have produced a plan that looked valid and had no headroom.The gate in
gate_qwen4exp_mtp.rschecked the planner's identity asMtpPlan::headroom = T.headroom + T.reserves - R. The planner now computesT.headroom - R, so the gate's identity and its comment say that.Release notes: Fixed: The drafted plan's headroom on a card with named reserves no longer reads too high.
Code shape
u64is a named error.cargo fmtwas applied.cargo clippywas not run for this PR.Duplication found or removed: the two eight-term sums in
plan_mtp_withandplan_mtp_with_slotsare removed (crates/model/src/arch/qwen35moe/place.rs).What I ran
cargo test -p bloomery-model --lib qwen35moe::placeResult: rc 0.
The new test
a_draft_reserve_past_u64_is_refused_by_namegives the cardu64::MAXusable bytes and a named reserve ofu64::MAXminus the target's other terms, for one slot and for two. Without the fix it failed at "1 slots" with rc 101. With the fix it passes.The new test
drafted_headroom_counts_the_stage_cards_reservesgives the card a named reserve and checks, for one and two slots, that the drafted headroom equals the card's usable bytes minus the target's terms minus the draft's reserve. It is part of the run above.Not run: the full t0 tier.
GPU evidence
The gate binary changed (the identity expression and its comment), so I ran its fixture tier on a GB10 card:
The gate exited 0. The four clauses left to the real tier did not run in this fixture run.
What I ran into
This does not block review. The four clauses above need the real tier, which I did not run. A maintainer needs to run it on a card.
Hardware (if the change is for a machine)
One DGX Spark (NVIDIA GB10, driver 595.84, CUDA 13.3), fixture tier only. The unit tests are host-only and open no card.
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