Right now core outputs 320 x 288.
But if we research a bit....
https://worldofspectrum.org/faq/reference/48kreference.htm
"Now for the timings of each line itself: define a screen line to start with 256 screen pixels, then border, then horizontal retrace, and then border again. All this takes 224 T states. Every half T state a pixel is written to the CRT, so if the ULA is reading bytes it does so each 4 T states (and then it reads two: a screen and an ATTR byte). The border is 48 pixels wide at each side. A video screen line is therefore timed as follows: 128 T states of screen, 24 T states of right border, 48 T states of horizontal retrace and 24 T states of left border."
24 T states of left border = 48
24 T states of right border = 48
Should be 48 + 256 + 48 = 352 horizontally.
Right now core outputs 320 x 288.
But if we research a bit....
https://worldofspectrum.org/faq/reference/48kreference.htm
"Now for the timings of each line itself: define a screen line to start with 256 screen pixels, then border, then horizontal retrace, and then border again. All this takes 224 T states. Every half T state a pixel is written to the CRT, so if the ULA is reading bytes it does so each 4 T states (and then it reads two: a screen and an ATTR byte). The border is 48 pixels wide at each side. A video screen line is therefore timed as follows: 128 T states of screen, 24 T states of right border, 48 T states of horizontal retrace and 24 T states of left border."
24 T states of left border = 48
24 T states of right border = 48
Should be 48 + 256 + 48 = 352 horizontally.