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Let the VIC-II see CPU writes to its bank at their own cycle, add Chars Sucks to Download & Run - #335

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highbyte merged 1 commit into
feature/cpu-cycle-enginefrom
feature/c64-cpu-timing-under-sprite-dma
Sep 17, 2026
Merged

highbyte merged 1 commit into
feature/cpu-cycle-enginefrom
feature/c64-cpu-timing-under-sprite-dma

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Summary

A byte the CPU rewrites in the middle of a line now reaches the screen from the column after the write, as on hardware, and the demo that needed it joins the Download & Run lists.

  • The VIC-II sees CPU writes to its bank at their own cycle. The chip and the renderer walked an instruction's cycles only after it had completed, so the fetches of a store instruction's earlier cycles saw the byte its last cycle wrote. Before such a write lands, the chip and the renderer are now brought through the write's own cycle: the fetches before it, and the fetch of that cycle itself (the chip reads in a cycle's first clock phase, the CPU writes in its second), see the old byte.
  • The bank address ranges excluded their last byte (< 0x3fff and so on): $0FFF, $1FFF, $3FFF, $7FFF, $BFFF and $FFFF never reached the VIC-II's write inspection, neither for this nor for the sprite and character set change detection. The last byte of a bank is where the idle byte lives.
  • Naming. The shared OnAfterInstruction lifecycle hook is unchanged. The C64's two mid-instruction callers (a read held by the chip's bus request, and a write into the chip's bank) go through a C64-only IVic2CycleRenderer.CatchUpToVic2(), which the rasterizer implements and the C64 caches when the render provider is selected; the pixel generator interface's method is renamed to match. Providers with no notion of cycles no longer get mid-instruction calls.
  • Chars Sucks (Triad) added to the Avalonia and browser Download & Run lists: no characters at all, the display off for the whole frame with the vertical border left open, sprites behind the idle graphics, and the blocks' shading on its two X-expanded sprites is the idle byte of the VIC-II's bank rewritten twice per line for a few cycles at a time.
  • A CPU-driven test over the four banks; docs updated.

Verification

  • A per-instruction trace shows the demo's stores land in exactly the cycles its author needs (index 13 and 20 after the eight-sprite stall); only the fetch order within the instruction was wrong.
  • Chars Sucks's logo band is structurally identical to its csdb screenshot (0 pixels by grey-level rank, 504 before).
  • VICE harness, 274 VIC-II tests on both models: 237 to 239 match (gfxfetch PAL and NTSC, which rewrite graphics memory as it is fetched), nothing worse.
  • Games A/B against the integration branch: identical for Commando (two snapshots, D64 PAL and NTSC) and Giana Sisters (D64 PAL and NTSC). Demos: Chars Sucks changes by the stripes, For Your Sprites Only by 1-3 pixels, twelve identical.
  • The rename changes no behaviour: two demos render byte-identically before and after, and the stall-sensitive harness suites are unchanged.
  • Timing (For Your Sprites Only, 600 frames, three repeats, four alternating rounds, MacBook Air M1): no consistent change in any renderer configuration.
  • Whole solution builds, both app shells build; full test suite passes (the wall-clock test passes when run alone).

… bank ranges' last byte, add Chars Sucks to Download & Run
@sonarqubecloud

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highbyte merged commit cb30898 into feature/cpu-cycle-engine Sep 17, 2026
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highbyte deleted the feature/c64-cpu-timing-under-sprite-dma branch September 17, 2026 12:40
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