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spec(GFX1100-TG150): commit the 150 tok/s campaign spec - #4

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spec(GFX1100-TG150): commit the 150 tok/s campaign spec#4
ghazni101 wants to merge 2 commits into
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row/GFX1100-TG150-SPEC

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Closes #3 (the campaign issue; the spec is the first landing — implementation stages will land as their own row/GFX1100-TG150-* pull requests and this one stays open until S7 discharges or amends it).

Note: this pull request was briefly opened at mudler/vllm.cpp#1652 in error on
2026-08-22 (closed there). This fork copy is the record of truth.

What and why

The developer set a goal on 2026-08-22: serve Qwen3.5-4B-Q4_K_M.gguf on the RX 7900 XTX (gfx1100, ROCm 7.14.0) at >= 150 tok/s text generation, pure autoregressive greedy decode, no speculative decoding, on an fp8-e4m3 KV cache (cache_dtype=fp8, the vLLM-mirrored surface). This change lands the campaign spec .agents/specs/gfx1100-tg150.md and appends the campaign row to .agents/issue-index.md. Spec-before-code: no product source is touched.

Design

Staged S1-S7: S1 re-prices attribution (wall vs GPU-busy) on the exact acceptance workload before any lever is chosen; S2 dispatch-collapse; S3 quant GEMM; S4 hipBLASLt bf16 arms; S5 GDN decode levers; S6 extends the landed KV-FP8 CPU brick to a ROCm store + paged-attention read behind --kv-cache-dtype; S7 runs the acceptance gate (median of >= 5 reps, idle host, flock held, batch 1, ~512-token prompt, 256 generated tokens, greedy) plus docs/weights-provenance landing. Correctness policy: keep-quant integer core stays bit-exact vs CPU with test_rocm_quant_dot unchanged; token identity vs pre-campaign outputs for every bit-exact lever; the fp8-KV arm gated distributionally per the ratified near-tie doctrine.

Classification

Policy/document only: .agents/specs/gfx1100-tg150.md (new spec), .agents/issue-index.md (append-only union row). No product, test, script, checker, CI, or generated paths touched.

FOLLOWING_AGENTS_PROTOCOL

Following-Agents-Protocol: true
AI-Assisted: true
Assisted-by: AGENT:ox-alpha [omp]

The developer set a goal on 2026-08-22: serve Qwen3.5-4B Q4_K_M on the RX
7900 XTX at 150 tok/s text generation, pure autoregressive greedy decode
with no speculative path, on an fp8-e4m3 KV cache. Issue mudler#1651 records the
goal and this spec turns it into a gated, staged campaign: S1 re-prices the
attribution on the exact acceptance workload before any lever is chosen,
S2-S5 take the kernel and dispatch levers in S1's order, S6 extends the
landed KV-FP8 CPU brick to a ROCm store and paged-attention read behind the
cache_dtype=fp8 surface that rocm_paged_attn.hip refuses by name today, and
S7 runs the median-of-five idle-host acceptance gate. The index gains the
campaign row; mudler#1586 stays scoped to the quant-GEMM bandwidth ladder.

The wall-vs-GPU-busy gap at current head (17.8 tok/s wall against 4.41 ms
GPU busy per token) is recorded as an inference to verify, not a finding:
one rocprofv3 capture at a different prompt length priced it, and S1 owns
the re-take.

FOLLOWING_AGENTS_PROTOCOL

Following-Agents-Protocol: true
AI-Assisted: true
Assisted-by: AGENT:ox-alpha [omp]
S1-S3 complete at 96.0 tok/s median (target 150). The campaign
exhausted optimization attempts within the allowed edit scope
(src/vt/rocm/ and tests/vt/). The Outcome section records what was
measured, what was rejected, why each default has its value, and the
next traceable hypothesis: porting the CUDA-only async device mirror
and executor to ROCm (requires runner.cpp changes outside the allowed
scope) and a fundamentally different GEMV kernel design for >53%
bandwidth efficiency.

Following-Agents-Protocol: true
AI-Assisted: true
Assisted-by: AGENT:glm-5-2 [omp]
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GFX1100-TG150: serve Qwen3.5-4B-Q4_K_M on the RX 7900 XTX at >= 150 tok/s pure autoregressive tg

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