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mem,dev-amdgpu,tests: support shared pools and MI300X CI - #9
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Allow PhysicalMemory and System to map bounded regions of an existing file. Validate page alignment, offsets and file size before mapping. Leave resizing and removal to the file owner so multiple processes can share a pool without truncating another region. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
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Use AMDGPUDevice's PhysicalMemory entry for vfio-user BAR access and GPU page walking, including externally assigned file offsets. Keep one owner for the mapping and unlink owned POSIX backing on normal exit while preserving supervisor-owned pool files. Remove disconnected client poll registrations before simulation exit and keep one primary responder for the fixed legacy VGA ROM window. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
Configure assigned RAM and VRAM regions using JSON memory maps, including nonzero offsets and split ranges. Validate alignment, bounds and overlap, and retain Q35 defaults for named-memory use. Keep each GPU's translation hierarchy, compute-unit indices and PCI wiring local to that device. Configure the bridge through its GPU owner and use deferred annotations on supported Python interpreters. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
Build VEGA_X86 with vfio-user and reuse the binary for actual MI300X and GPU_VIPER regressions. Check mapped regions, descriptor ownership, bidirectional BAR data, multiple GPUs and normal POSIX cleanup. Preserve externally owned pool files and record complete model diagnostics. Keep source checks and build caching in the focused workflow. Remove the generic architecture, compiler and scheduled workflows from this fork. Signed-off-by: Chao Liu <chao.liu.zevorn@gmail.com>
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A supervisor can assign guest RAM and VRAM regions within one shared file.
PhysicalMemory validates and maps those regions while the supervisor retains
file ownership. MI300XVfioUser borrows the VRAM mapping, descriptor, offset and
size from AMDGPUDevice, so BAR access and GPU page walking use the same backing.
The configuration accepts Q35 and ARM64 guest physical maps, including nonzero
RAM file offsets and split ranges. Python annotations support Python 3.8.
Each GPU has its own translation hierarchy, local CU indices and explicit PCI
upstream. BAR4 describes the MSI-X memory region, and GPU 0 owns the fixed
legacy VGA ROM window. Client disconnect removes its poll registration before
normal simulation exit.
GPU-owned POSIX VRAM is unlinked on normal exit. External regular-file pools
remain owned by the supervisor.
The fork has one MI300X CI workflow. It builds VEGA_X86 with vfio-user, checks
source formatting and runs actual model regressions. Other registered workflows
remain disabled. The existing test step installs psutil to inspect live memory
mappings and builds a client against the bundled libvfio-user transport.
Validation from the cosim-gpu workspace:
just build-gem5 8.just test-gem5-mi300x <output>exercises Q35/ARM64 maps, nonzero offsets,split ranges, RAM after VRAM, pool guards and invalid input rejection.
mapped writes read through protocol callbacks, and protocol writes observed
through the mapping and pool file. Live mapping checks require one owner.
GPU 0 isolation, successful server exit after client disconnect and removal
of owned POSIX memory names.
gem5 hooks, commit-message checks and workflow validation.
The tested native ARM64 binary SHA-256 is
b2367fe04bf08a9b0ccfc7af4b9aeeb69e7aaa6138cfb8b194c60a83df788218.Host integration uses a paused host and covers startup, vfio-user connection,
mapping setup and cleanup. Full Linux guest boot and GPU workloads are outside
this validation. Build/runtime diagnostics include the SystemC architecture
probe, bandwidth units, DRAM geometry, legacy statistics and terminal/timer
notices; raw logs and verdicts are retained in the task artifacts.