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The part declared pads 1, 2, 3, 25, 33, 34, 35 and 36 — supply, enable,
boot, UART and I2C. The module has 39. The other 31 were not documented
as deliberate omissions; they were simply absent, so no rule could say
anything about them and a board could leave the module's own flash bus
shorted to a rail without a diagnostic.
What the missing pads are, and why each is now modelled:
17-22 the module's internal SPI flash bus, bonded to the flash die
inside the shield. A design that connects one of these
corrupts the firmware it is trying to run, so they carry
`do_not_connect` and a board that wires them is now a
diagnostic rather than a silent fault.
32 marked NC by Espressif. Same treatment.
15, 38, 39 GND. Pad 39 is the ground paddle under the shield and the
module's only thermal path. Four pads, so a board has to reach
four pads.
4-7 GPIO36, 39, 34 and 35: input-only, with no output driver and no
internal pull. They carry `input`, so driving one is caught.
the rest ordinary bidirectional GPIO, with the strapping pins
(IO0, IO2, IO5, IO12, IO15) noted where the boot-time
behaviour is what a reviewer needs to know.
The eight names that already existed are unchanged — `io21_sda` and
`io1_tx` keep their spellings, because designs address pins by name and
renaming them would break every board that uses the part.
The new pads are not `required`. The eight-pin model did not require
them, and the twenty-odd ERC fixtures that instantiate this module
connect only pad 1; making four grounds required would have fired
E-SYNTH-CONNECT-001 across all of them. Completing the model and
tightening the requirement are separate changes.
Verified against the libraries CI installs, extracted from the 10.0.7
packages rather than this machine's flatpak: all 39 numbers exist in
`RF_Module:ESP32-WROOM-32` and all 39 pads exist in the footprint, so
`registry qualify` reports no pin or pad coverage finding for this part.
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Closing: #195 already models all 39 pads of this module, and does it as part of completing 22 parts rather than one. I opened this after auditing the ESP32 package model for #184 without first checking whether an open PR covered it. #195 did. Checked both before closing — same 39 pads, same pad 32 and 17-22 treatment. The audit was not wasted: it also found four parts whose pins pointed at the wrong pads, and a load-time rule that makes that class impossible, which is now #253. |
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What type of PR is this?
This is a bug fix
What does this do?
Models all 39 ESP32-WROOM-32 pads. Pads 17-22 and 32 become
do_not_connect; 4-7input; 15, 38, 39 ground.Which issue(s) does this PR fix/relate to?
Answers the package-model finding on #184. Prerequisite for that board.
Have you included tests for your changes?
No new test.
registry qualifyagainst CI's 10.0.7 libraries reports no pin or pad coverage finding.Did you document any new/modified features?
Yes, a pin-map comment: the internal flash bus, the four grounds, the strapping pins.
Notes
New pads are not
required; requiring four grounds would fireE-SYNTH-CONNECT-001across twenty ERC fixtures.