ZhiHe A210: add peripheral support (GPIO/timers/I2C/SPI/DMA)

Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

@@ -14,13 +14,35 @@ description:
 
 allOf:
   - $ref: dma-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: zhihe,a210-axi-dma
+    then:
+      properties:
+        dma-channels:
+          maximum: 16
+        snps,priority:
+          maxItems: 16
+        snps,block-size:
+          maxItems: 16
+    else:
+      properties:
+        dma-channels:
+          maximum: 8
+        snps,priority:
+          maxItems: 8
+        snps,block-size:
+          maxItems: 8
 
 properties:
   compatible:
     enum:
       - snps,axi-dma-1.01a
       - intel,kmb-axi-dma
       - starfive,jh7110-axi-dma
+      - zhihe,a210-axi-dma
 
   reg:
     minItems: 1
@@ -56,7 +78,7 @@ properties:
 
   dma-channels:
     minimum: 1
-    maximum: 8
+    maximum: 16
 
   resets:
     minItems: 1
@@ -80,14 +102,14 @@ properties:
       Channel priority specifier associated with the DMA channels.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 1
-    maxItems: 8
+    maxItems: 16
 
   snps,block-size:
     description: |
       Channel block size specifier associated with the DMA channels.
     $ref: /schemas/types.yaml#/definitions/uint32-array
     minItems: 1
-    maxItems: 8
+    maxItems: 16
 
   snps,axi-max-burst-len:
     description: |
@@ -117,6 +139,7 @@ if:
       contains:
         enum:
           - starfive,jh7110-axi-dma
+          - zhihe,a210-axi-dma
 then:
   properties:
     resets:

Documentation/devicetree/bindings/riscv/zhihe.yaml

@@ -20,7 +20,7 @@ properties:
       - description: Zhihe A210 evaluation board
         items:
           - enum:
-              - zhihe,a210-dev
+              - zhihe,melon-pi
               - zhihe,a210-evb
           - const: zhihe,a210
 

arch/riscv/boot/dts/zhihe/Makefile

@@ -1,3 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 
-dtb-$(CONFIG_ARCH_ZHIHE) += a210-evb.dtb a210-dev.dtb
+dtb-$(CONFIG_ARCH_ZHIHE) += a210-evb.dtb a210-melon-pi.dtb

arch/riscv/boot/dts/zhihe/a210-evb.dts

@@ -392,6 +392,7 @@
 };
 
 &uart4 {
+	status = "okay";
 	/*
 	 * Keep the console UART independent of the optional A210 pinctrl
 	 * driver.  The boot firmware has already configured these pins.
@@ -478,52 +479,40 @@
 	};
 };
 
-&uart0 {
-	status = "disabled";
-};
-
-&uart1 {
-	status = "disabled";
-};
-
-&uart2 {
+&peri3_padctrl {
 	status = "disabled";
 };
 
-&uart3 {
-	status = "disabled";
+&aon {
+	/delete-node/ regulators;
 };
 
-&uart5 {
-	status = "disabled";
+&watchdog0 {
+	/delete-property/ power-domains;
 };
 
-&uart6 {
-	status = "disabled";
-};
+/delete-node/ &power;
 
-&uart7 {
-	status = "disabled";
+&aon_gpio0 {
+	status = "okay";
 };
 
-&uart8 {
-	status = "disabled";
+&aon_gpio1 {
+	status = "okay";
 };
 
-&uart9 {
-	status = "disabled";
+&peri1_gpio0 {
+	status = "okay";
 };
 
-&peri3_padctrl {
-	status = "disabled";
+&peri1_gpio1 {
+	status = "okay";
 };
 
-&aon {
-	/delete-node/ regulators;
+&peri2_gpio2 {
+	status = "okay";
 };
 
-&watchdog0 {
-	/delete-property/ power-domains;
+&peri2_gpio3 {
+	status = "okay";
 };
-
-/delete-node/ &power;

arch/riscv/boot/dts/zhihe/a210-dev.dts → arch/riscv/boot/dts/zhihe/a210-melon-pi.dts

@@ -4,8 +4,8 @@
 #include "a210.dtsi"
 
 / {
-	model = "Zhihe A210 Development Board";
-	compatible = "zhihe,a210-dev", "zhihe,a210";
+	model = "Zhihe Melon Pi";
+	compatible = "zhihe,melon-pi", "zhihe,a210";
 
 	aliases {
 		ethernet0 = &gmac0;
@@ -330,6 +330,7 @@
 };
 
 &uart4 {
+	status = "okay";
 	/*
 	 * Keep the console UART independent of the optional A210 pinctrl
 	 * driver.  The boot firmware has already configured these pins.
@@ -342,6 +343,7 @@
 };
 
 &uart8 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart8_pins>;
 };
@@ -357,6 +359,7 @@
 };
 
 &uart5 {
+	status = "okay";
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart5_pins>;
 };
@@ -416,30 +419,30 @@
 	};
 };
 
-&uart0 {
-	status = "disabled";
+&aon_gpio0 {
+	status = "okay";
 };
 
-&uart1 {
-	status = "disabled";
+&aon_gpio1 {
+	status = "okay";
 };
 
-&uart2 {
-	status = "disabled";
+&peri1_gpio0 {
+	status = "okay";
 };
 
-&uart3 {
-	status = "disabled";
+&peri1_gpio1 {
+	status = "okay";
 };
 
-&uart6 {
-	status = "disabled";
+&peri2_gpio2 {
+	status = "okay";
 };
 
-&uart7 {
-	status = "disabled";
+&peri2_gpio3 {
+	status = "okay";
 };
 
-&uart9 {
-	status = "disabled";
+&peri3_gpio {
+	status = "okay";
 };