Automated Daily Update | Last Run: 2026-06-05 11:27 UTC
Papers are automatically categorized by topic and sorted by date.
2026-06-04 | Mauro Di Marco, Mauro Forti, Luca Pancioni et al.
The paper considers a large class of nonlinear circuits, termed RLCM, containing all four basic circuit elements, i.e., resistors, inductors, capacitors and memristors. A companion paper [1] has introduced a mixed potential for RLCM circuits generalizing that found by Brayton and Moser for circuits without memristors. In this paper, systematic Lyapunov-like results on convergence of RLCM circuits are proved by means of the mixed potential. These hold under the basic assumption that an RLCM circuit has a complete set of variables in the flux-charge domain and they require, roughly speaking, that there is a balance, which is quantitatively estimated, between capacitors and inductors. The convergence results are robust with respect to circuit parameter variations and they include cases where the memristor circuits possess multiple stable equilibrium points, which is of importance for instance to implement content addressable memories (CAMs). The results extend to circuits possessing all four basic circuit elements previous results that pertain to circuits without memristors or memristor circuits without inductors. The main proofs are conducted by using the flux-charge analysis method (FCAM) to analyze RLCM circuits in the flux-charge domain.
Electrolyte Bonding Engineering for Highly Uniform GeTe-based CBRAM and Parallel Hebbian Learning in Selector-free Hopfield Networks
2026-06-04 | Jiin Bang, Jingyeong Hwang, Unhyeon Kang et al.
Hopfield networks offer a hardware-friendly framework for energy-efficient associative memory, yet their practical realization in memristor crossbar arrays is critically hindered by device-to-device (D2D) variability, which prevents reliable parallel programming. Here, we address this bottleneck through systematic composition engineering of the Ge-Te solid electrolyte in conductive bridge random access memory (CBRAM) devices. By varying the Ge:Te ratio, we identify Ge3.5Te1 as an optimal electrolyte composition that suppresses stochastic resistance variation by approximately three orders of magnitude compared to GeSe-based devices. Raman spectroscopy reveals that this dramatic improvement originates from a bonding network dominated by asymmetric-stretching GeTe4 tetrahedral units, which form interconnected free-volume channels that confine and stabilize Cu+ ion migration pathways. Leveraging this enhanced uniformity, we fabricate a selector-less 16x16 Cu/Ge3.5Te1 CBRAM crossbar array and demonstrate a 4x4 Hopfield associative network capable of learning and recalling binary pattern pairs via fully parallel programming using a half-selection scheme. Successful pattern recall is achieved for up to two stored associations despite the absence of selector elements, establishing a proof-of-concept for selector-free hardware implementations of associative memory. These results highlight the critical role of electrolyte bonding structure in determining memristor uniformity and provide a materials-driven pathway toward scalable, parallel neuromorphic computing systems.
2026-06-03 | Mauro Di Marco, Mauro Forti, Luca Pancioni et al.
In two seminal articles published in 1964, Brayton and Moser introduced the concept of a mixed potential as a fundamental theoretic tool to describe and analyze a class RLC of nonlinear circuits containing resistors, capacitors and inductors. In this paper, it is shown for the first time that a mixed potential can be introduced for a class RLCM of RLC circuits containing also memristors. This is possible provided a memristor circuit is analyzed not in the traditional voltage-current domain but rather in the flux-charge domain. The flux-charge analysis method (FCAM) plays a crucial role in the extension, in particular, a key step is an equivalence principle established via FCAM between an RLCM circuit in the flux-charge domain and a nonlinear RLC circuit in the voltage-current domain. Several examples are discussed where the mixed potential is explicitly found. These include basic circuits with memristors, such as Chua's circuit with a memristor and also large-scale memristor arrays with a neural architecture. This paper is mainly devoted to the introduction of a mixed potential for memristor circuits and the study of its main theoretic properties, as the possibility to write the circuit state equations in the flux-charge domain in an effective and compact form via the mixed potential. In a companion paper [1], the mixed potential is used to obtain in a systematic way Lyapunov-like results on convergence of RLCM circuits. Those results will extend existing results on convergence that do not cover the important case where there is the simultaneous presence of capacitors and inductors in a memristor circuit.
2026-06-02 | Wellington Avelino, Yann Beillard, Fabien Allibart et al.
Heterogeneous neuromorphic hardware integrates devices with dissimilar electrical characteristics and dynamics, making functional compatibility at their interconnections a primary design challenge. Direct coupling alone is insufficient to ensure correct operation, because the load-line conditions established at each junction determine the effective operating regime. Here, we propose a junction-centered interface framework in which inter-device connections are described through assigned drive/sense roles and organized into canonical functional interface blocks. As a concrete hardware realization, a second-generation current conveyor (CCII)-based implementation is then adopted as a composite realization of these interface primitives. The framework is validated experimentally in a Pavlovian-conditioning demonstrator combining a memristive synapse with a unijunction-transistor (UJT) post-neuron. By linking local junction conditions to reusable interface functions, the proposed methodology provides a systematic basis for the design and analysis of heterogeneous neuromorphic systems.
20 ps Non-Destructive Read and 1 ns Write Operations at <5 V in Ferroelectric HfO2/ZrO2 Non-Volatile Memories
2026-06-02 | Alexandre Baigol, Ruben Hamming-Green, Paul Uriarte Vicandi et al.
Achieving low-voltage, nanosecond multi-level programming and non-destructive read-out of ferroelectric non-volatile memories (NVM) is critical for analog in-memory computing architectures relying on ferroelectric capacitive devices (FeCap). We integrate HfO2/ZrO2 ferroelectric nanolayers concurrently in the BEOL of CMOS and on SiO2/Si, achieving nanosecond multilevel switching with programming voltages below 5 V. Partial ferroelectric switching enhances FeCap endurance above 1011 cycles, leading to MemCapacitance (MC) states with non-destructive read-out and 10-year retention. However, experiments reveal the collapse of the MC window for read frequencies above 1 MHz. To overcome this speed limit, we introduce a novel, non-destructive readout methodology. Using electrical pulses with widths down to 20 ps, below the RC time constant of the FeCaps, we enable measurement of the polarization-dependent leakage current, providing ultrafast and non-destructive read operations at only 14 fJ.
2026-06-01 | Tanweer Ahmed, Kenji Watanabe, Takashi Taniguchi et al.
Achieving synaptic functionality electronically in a single-element quantum material is a fundamental challenge, as conventional methods rely on the introduction of extrinsic charge-traps or polar components. Here, we demonstrate that twisted double bilayer graphene (tDBLG) moiré superlattices, composed purely of carbon, exhibit electronic hysteresis and plasticity in presence of twist-angle disorder. Inversion symmetry breaking at the moiré length scales also gives rise to second-order nonlinear electrical response via disorder-mediated extrinsic mechanisms. Such second-order nonlinearity is highly tunable in both sign and magnitude by varying carrier concentration and vertical displacement field. We harness the coexistence of electronic plasticity and second-order nonlinearity to realize a second-order synaptic memory device. Our findings establish strained moiré carbon systems as a powerful new platform for energy-efficient neuromorphic computing, demonstrating that complex electronic functionality can emerge purely from symmetry breaking physics in a single-element material.
2026-06-01 | Chieh-Tung Cheng, Mustafa Aslanov, Eiman Kanjo
Edge AI nodes for search and rescue are increasingly expected to run computer vision locally, yet ultra-low-end hardware imposes hard constraints on memory, compute, and inter-device communication. This work addresses occlusion-robust object detection on devices with less than 1 MB SRAM by combining an MCUNet backbone, a YOLOv2 detection head, and Lite quantisation. Two collaborative inference strategies are evaluated: feature-level fusion, concatenating intermediate feature maps, and decision-level fusion via Weighted Boxes Fusion (WBF). WBF outperforms feature-level fusion under all tested occlusion conditions, yielding gains of up to +0.2736 mAP in asymmetric scenarios. Extending fusion to three views improves accuracy further (up to +0.3827 mAP) at modest communication overhead (~1.3 KB per exchange). Hardware experiments progress from a host-assisted USB-relay baseline to a Wi-Fi peer-to-peer deployment on two Coral Dev Board Micro units, where WBF executes on-device with negligible communication energy relative to inference. In a 301.9 s autonomous session of 108 frames, fused output is produced on 61 frames versus 47 for a single board - a coverage gain of +29.8%. A decentralised federated learning feasibility note is included but not treated as a primary result, as performance remains limited under non-iid data. The results support decision-level fusion as a viable option for improving occlusion robustness in small-scale edge object detection, including host-free multi-board operation on ultra-low-end hardware.
CRAM-ER: Error-Resilient Spintronic Computational Random Access Memory for Scalable In-Memory Computation
2026-06-01 | Sohan Salahuddin Mugdho, Md. Shahedul Hasan, Brahmdutta Dixit et al.
Deep neural networks (DNNs) have achieved state-of-the-art performance across diverse domains. However, typical Von Neumann compute paradigms face severe memory bottlenecks. Emerging near-memory and compute-in-memory approaches alleviate this but incur significant peripheral overhead. Computational Random Access Memory (CRAM) based on MRAM enables in-situ logic without peripheral overhead, offering a dense, energy-efficient solution. However, probabilistic MRAM switching induces gate-level errors that limit the scalability and reliability of CRAM for accelerating DNN. Moreover, the large number of sequential MRAM writes severely constrains CRAM throughput. To address these challenges, we propose an error-resilient CRAM (CRAM-ER) architecture for scalable in-memory matrix-vector multiplications (MVMs). Our error-aware hardware-software co-design framework leverages a hybrid spintronic-CRAM + CMOS adder-tree architecture to mitigate the impact of device-level errors, demonstrating MVM functionality with high area and energy efficiency. We further develop an error-aware model fine-tuning and fine-grained error correction for enhanced error resilience. Evaluations of the CMOS+spintronic hybrid architecture on DNN benchmarks show near-lossless accuracy while reducing CRAM latency by up to 2 orders of magnitude, outperforming CPU/GPU+high-bandwidth DRAM in both energy efficiency and energy-delay product.
2026-06-01 | Corey Lammie
Analog In-Memory Computing (AIMC) accelerators execute matrix-vector multiplications directly within memory arrays, reducing data movement and improving DNN inference efficiency. Their limited effective precision motivates heterogeneous architectures that combine analog compute tiles with digital processing units. This letter classifies existing methods for partitioning DNN workloads across these resources by mapping granularity, optimization strategy, and model support, and distills them into a unified four-stage workflow. To demonstrate the workflow on a model class not yet addressed by existing methods, we apply its first two stages to GPT-2, producing the first AIMC-specific precision sensitivity profile for a decoder-only transformer. Sensitivity is dominated by 4 of 49 projections, with the first decoder block's attention output dominating by an order of magnitude. This suggests that projection-level mapping and selective digital execution of early-block and output-facing projections are important for reliable decoder-transformer deployment on AIMC hardware.
Voltage-driven transition from steady-state fluctuations to phase-transition noise in nanoscale VO$_2$ devices
2026-06-01 | Sebastian Werner Schmid, Zoltán Balogh, Botond Sánta et al.
We investigate the electrically driven metal-to-insulator transition (MIT) in nanoscale vanadium dioxide (VO$_2$) Mott memristor through noise spectroscopy and two-dimensional resistor network simulations. Our experiments focus on both the insulating phase as the applied voltage approaches the threshold voltage (set transition) and the metallic phase as the voltage is reduced toward the reset voltage (reset transition). In both regimes, we observe an order of magnitude increase in relative current noise near the transition points. To analyze the origin of this noise enhancement, we use simulations that capture the stochastic dynamics of the phase transition. The simulations indicate that the increased noise stems from amplified phase fluctuations near the percolation threshold, where competing metallic and insulating domains lead to dynamic reconfiguration of the conduction paths. In addition, we show that the precursor current fluctuations observed near the switching threshold are consistent with the threshold voltage variability measured in repeated switching cycles, indicating that the noise sets a lower bound on the achievable variance. These findings offer key insights into the non-equilibrium processes governing phase transitions in nanoscale VO$_2$ devices under electrical stimuli.
A 32-Channel 3.53-μW Per Channel Brain-Machine Interface SoC Featuring Dual-Threshold Delta-modulation, In-Memory Spike Detection and Bi-SNN Based Motor Decoding
2026-06-01 | Ye Ke, Zhengnan Fu, Pao-Sheng Vincent Sun et al.
With the scaling of sensor channel counts, systems confront challenges in frontend data sensing and on-implant data processing. This work presents a 32-channel fully event-based iBMI SoC in 65nm CMOS for an efficient neuromorphic signal processing pipeline. The SoC integrates a 32-channel dual-threshold delta modulation (DTDM) frontend array that provides up to 26x data compression at the frontend, an in-memory computing (IMC) spike detector (SPD) for efficient in-pixel spike detection, and a bipolar LIF-based spiking neural network (Bi-SNN) decoder for on-chip motor intention decoding (MID). Consuming only 3.53 μW per channel and achieving ~0.62 decoding R2 with a compact 0.034 mm2 per-channel area, the chip enables high-efficiency signal recording, processing, and decoding for implantable devices.
Emerging Non-Volatile Opto-electronic Resistive Memories for Next-Generation Photonic Integrated Circuits
2026-05-31 | Santosh Kumar, Mukesh Kumar, Eunso Shin et al.
Photonic integrated circuits have emerged as a powerful platform for high speed communication, sensing, and information processing due to their large bandwidth, low latency, and inherent parallelism. However, the absence of efficient, scalable, and non-volatile memory elements remains a fundamental limitation for realizing fully programmable and adaptive photonic systems. Conventional electronic memories introduce significant energy overhead, latency, and architectural inefficiencies due to repeated optical electrical conversions. Non volatile opto electronic resistive memories or OERMs have recently emerged as a promising solution to address these challenges by integrating memory functionality directly within the photonic domain. These devices combine resistive switching mechanisms with optical readout, enabling persistent state retention, multilevel programmability, and energy efficient operation. In this review, we provide a comprehensive overview of OERMs, spanning from fundamental physical mechanisms to system level applications. We first discuss the underlying resistive switching phenomena, including filamentary conduction, interface type switching, phase change transitions, and ionic migration, with particular emphasis on their interaction with confined optical modes. We then examine key material platforms such as metal oxides, transparent conducting oxides, phase change materials, and emerging two-dimensional systems, highlighting their performance trade-offs. Furthermore, we analyse device architectures and benchmark their performance in terms of switching energy, speed, endurance, and optical modulation efficiency. The integration of OERMs into programmable photonic circuits, neuromorphic systems, and in-memory optical computing architectures is critically discussed. Finally, we outline the major challenges and future research directions toward scalable, reliable
2026-05-31 | Arfan Ghani
Neuromorphic computing relies on low-power, high-reliability hardware, yet the integrity of input/output pads (IOPADs) remains an underexplored factor affecting system performance. This chapter examines the role of IOPAD integrity in neuromorphic VLSI design and connects algorithmic development with practical hardware implementation. While much attention has been given to spiking neural networks (SNNs) and ultra-low-power core logic, the electrical and functional robustness of the I/O interface is equally critical for ensuring signal fidelity and minimizing energy consumption. We review the structure and function of IOPADs, outline their influence on power, performance, and reliability, and discuss design trade-offs involving pad libraries, pad ring architectures, and bonding strategies. The chapter also introduces the fundamentals of SNNs and summarizes the digital hardware design flow from behavioral description to physical layout. Physical implementation considerations are highlighted using the SkyWater 130 nm CMOS process as a practical platform for neuromorphic prototyping. Real-world examples illustrate how early-stage I/O planning can prevent redesign, reduce yield loss, and improve overall system efficiency. This work emphasizes that IOPAD integrity is a key enabler of scalable, energy-efficient neuromorphic systems.
2026-05-31 | Tauseef Ahmed, Tao Sun, Jeronimo Castrillon et al.
Deep learning has greatly advanced automatic speech recognition (ASR), enabling widespread deployment on edge devices such as smartphones and smart home systems. However, the computational and energy demands of deep neural networks pose significant challenges for such resource-constrained deployments, introducing latency and limiting real-time interaction. Neuromorphic computing offers a promising solution by introducing activation sparsity through spiking neural networks (SNNs) and event-driven neural networks, converting dense operations into sparse computations. However, a study that evaluates the hardware benefits of different neuromorphic strategies remains lacking for ASR. This paper explores spiking and event-driven neuromorphic neural networks to improve activation sparsity in the state-of-the-art SpeechMamba model for ASR. We introduce an event-driven SpeechMamba with FATReLU activation, achieving over 60% activation sparsity with less than 1% accuracy degradation on LibriSpeech. We also propose a spiking SpeechMamba that attains over 70% sparsity while using 30% fewer parameters than comparable SNNs. Finally, we develop a cycle-accurate event-driven simulator enabling flexible algorithm-hardware co-exploration, which helps us identify computational bottlenecks and yields over 10% additional efficiency improvements.
2026-05-31 | Nasib Ullah, Jinbin Zhang, Jean Lucien Randrianantenaina et al.
Extreme multi-label classification (XMC) involves learning models over large output spaces with millions of labels, making the output layer a memory-compute bottleneck. While sparsity-based methods reduce arithmetic complexity, they often fail to yield proportional speedups due to irregular memory access, poor hardware utilization, or reliance on auxiliary architectural components in long-tailed regimes. We introduce group-shared fixed fan-in sparsity, a semi-structured output-layer design in which semantically related labels share a sparse input pattern while retaining independent weights. This grouping introduces a task-aligned inductive bias -- encouraging related labels to share feature subsets -- while reducing index memory overhead, increasing feature reuse across labels, and enabling efficient GPU execution via custom CUDA kernels that leverage modern accelerator primitives. As an alternative to auxiliary objectives, we exploit the long-tailed structure of XMC by decomposing the output layer into a small dense head over frequent labels and a group-shared sparse tail over the remainder, providing an informative gradient pathway while preserving the memory benefits of sparsity. Through kernel-level microbenchmarking, we show that group-shared fixed fan-in translates arithmetic reductions into practical wall-clock gains, achieving up to
$4.4\times$ speedup in the forward pass and up to$25\times$ speedup in backward passes over standard fixed fan-in sparsity, while operating within a few percent of a FLOPs-matched dense bottleneck. Across large-scale XMC benchmarks, our approach matches or improves precision@k over prior sparse baselines, while narrowing the performance gap to dense.
2026-05-29 | Shrey Thakkar, Anthony Grbic
Neuromorphic computing promises fast and energy-efficient information processing for emerging applications such as artificial intelligence. This paper presents neuromorphic processors based on wave-based programmable transmission-line (TLIN) metamaterials. Specifically, 2D reactive electrical networks are proposed, consisting of a grid of interconnected subwavelength TLIN-based unit cells (neurons) with tunable reactive elements. During inference, the input data is encoded using single-tone sources impressed onto the network, and circuit quantities are measured to decode the output prediction. Computation is performed through wave propagation and interference across the grid, with the learned input-output relationships stored in the tunable reactive elements. A key contribution of this work is a scalable training method based on in-situ backpropagation. The adjoint variable method is used to derive a physical (electrical) realization of the backpropagation algorithm that is typically used to compute the gradient of the objective loss function in digital neural networks. This formulation computes the gradient from voltage measurements of two steady-state excitations: the forward pass (inference) and the adjoint pass (error backpropagation). This enables efficient training since it is independent of the number of trainable parameters and avoids the simulation-reality gap. To demonstrate the effectiveness of this approach, wave-based neuromorphic circuit networks are trained for allostery and classification tasks, and the system's robustness to damage is shown. This work paves the way for self-learning systems based on wave-based neuromorphic analog circuit hardware.
2026-05-29 | Qianhou Qu, Sheng Lu, Liuting Shang et al.
Spiking neural networks (SNNs) provide event-driven and low-power computation inspired by biological neural systems, but current implementations rely on von Neumann graphics processing units (GPUs) and central processing units (CPUs) platforms, where memory and computation bottlenecks limit energy efficiency. To address this challenge, this paper proposes an analog memristor-based spiking neural network (SNN) accelerator that integrates in-memory synaptic computation with analog integrate-and-fire (IF) neurons, eliminating multi-transistor CMOS synapse circuits and enabling asynchronous event-driven operation at the 45nm technology node. Additionally, a digital SNN accelerator is designed and optimized at the 5 nm technology node for comparison. The proposed architecture is evaluated using a predator-prey tracking task that emulates pursuit behavior. In this task, the analog SNN accelerator's inference closely matches the ideal software inference with a mean squared error (MSE) of 0.004. HSPICE simulation results show that the proposed analog SNN accelerator achieves 12.7 times lower energy consumption and 1.26 times lower delay compared to the digital baseline, demonstrating the potential of memristor-based neuromorphic circuits for energy-efficient real-time edge intelligence.
Compact and Energy-Efficient Memristive Spiking Neuromorphic Accelerator for Bio-inspired Interception Tasks
2026-05-29 | Qianhou Qu, Sheng Lu, Sungyong Jung et al.
Spiking neural networks (SNNs) provide an efficient event-driven computing paradigm for bio-inspired interception tasks. However, most implementations rely on von Neumann digital computing platforms, where memory and computation bottlenecks limit energy efficiency. This work presents a compact and energy-efficient memristive neuromorphic accelerator for bio-inspired interception tasks. A novel one-transistor-one-resistor (1T1R) crossbar array is designed to emulate synaptic operations in the in-memory computing (IMC) domain, while circuit-level optimization mitigates membrane drift and improves integration fidelity. In addition, an integrate-and-fire (IF) neuron with separated input and membrane nodes is developed to improve inference robustness during array-interfaced operation. Implemented in the SkyWater SKY130 PDK, the proposed neuron achieves an energy consumption of 10.67 pJ/spike and an area of 906 um^2. System-level results show that the memristive IMC output closely matches the software SNN baseline, with a correlation coefficient of 0.9622, while achieving a 96% interception success rate. These results demonstrate the effectiveness of the proposed design for compact and reliable memristive SNN inference in bio-inspired interception tasks.
2026-06-04 | Haihang Xia, Xinyu Zhao, Xuecheng Wang et al.
Spiking neural networks (SNNs) have the potential to emerge as the third generation of neural networks and have attracted increasing attention across a wide range of applications. However, the large number of synaptic connections in SNNs leads to intensive weight-update computation by on-chip learning algorithms during training, resulting in substantial hardware resource utilization and energy consumption. Among existing SNN learning algorithms, spike-timing-dependent plasticity (STDP) is one of the most extensively studied and widely adopted, serving as a fundamental learning component in SNNs. To address the hardware and energy overheads associated with SNN training, this paper presents intrinsic-timing power-of-two STDP (ITP-STDP) and its corresponding prototype learning engine hardware architecture. The proposed design is evaluated through a dedicated mean-field synaptic drift model for dynamical analysis and further validated across SNN networks of different scales and datasets. It is further implemented on both ASIC and FPGA platforms and compared with state-of-the-art approaches, including the original STDP and more complex STDP variants. The results demonstrate superior energy efficiency, higher operating speed, and substantially lower hardware resource utilization, as the proposed design eliminates most of the computational overhead of STDP through both algorithmic and hardware-level optimizations. On the FPGA platform, the proposed design improves energy efficiency by 4.5$\times$ to 219.8$\times$ over the compared designs. On the ASIC platform, the proposed design achieves a 4.8$\times$ to 22.01$\times$ speedup while consuming only 1.2% to 3.3% of the area required by prior works.
2026-06-04 | Cunhang Fan, Enrui Liu, Jing Zhou et al.
Although artificial neural network (ANN) based speech enhancement (SE) methods demonstrate excellent performance, the high computational complexity and high energy consumption hinder their deployment in practical front-end processing tasks.} Currently, the spiking neural networks (SNNs) have shown potential in reducing power consumption. However, the discrete binary activation and complex spatio-temporal dynamics of SNNs often result in information loss. The current challenge therefore focuses on how to maintain performance and reduce computational complexity. To address this issue, this work propose a Dual-Branch Hybrid Neural (DBHN) Network. 1) In terms of network architecture: A dual-branch network integrating ANN and SNN was designed, where the SNN branch reduces power consumption while the ANN branch addresses information loss; The BandSplit and Time-Frequency (TF) -Mamba modules were developed to simultaneously compress energy consumption and enhance model performance; Spiking Feature Extraction Group (SFEG) and Information Transformation Block (ITB) components were implemented with residual connections to mitigate information loss while further refining feature representations. 2) To facilitate inter-branch information fusion: An Interaction module was designed to promote information exchange at various stages of the dual-branch network; A TF-Cross Attention-Fusion module was designed to perform time-frequency domain fusion of dual-branch information while data-adaptively guiding the SNN branch to retain more critical information. Results show that the proposed model maintains superior performance across three public datasets while achieving an average 7.5 fold reduction in computational complexity compared to baseline models.
2026-06-03 | Anton Montag, Julius T. Gohsrich, Quentin Levoy et al.
Exceptional points appear in non-Hermitian systems as degeneracies, where not only eigenvalues but also eigenvectors coalesce. They are of great theoretical and experimental interest due to their exotic topological properties and enhanced sensitivity to perturbations. Experimental realizations of higher-order exceptional points, where more than two eigenvectors coalesce, rely on highly fine-tuned setups. Recently, stimulated Brillouin scattering has been employed to generate second-order exceptional points in a fabrication-free setup by leveraging off-resonant scattering. In this work we generalize this approach, and we develop an off-resonant, multimode theory for stimulated Brillouin scattering as an avenue towards realizing symmetry-induced exceptional points of any order. We present the experimental implementation of our program in an accompanying paper. Our multimode theory could also be employed in applications in optoacoustic sensing, synthetic neuromorphic computing, microwave photonic filters, and optoacoustic quantum signal processing.
Quadratic integrate-and-fire neurons exhibit less fragmented loss landscapes and outperform leaky integrate-and-fire neurons in spike-based gradient descent
2026-06-02 | Carlo Wenig, Raoul-Martin Memmesheimer, Christian Klos
The ability to train spiking neural networks is essential for modeling biological neural networks as well as for neuromorphic computing. However, for the extensively used leaky integrate-and-fire (LIF) neurons, arbitrarily small parameter changes can induce spike (dis)appearances that disrupt subsequent activity, leading to unstable neural representations and permanently silent neurons during exact spike-based gradient descent. Recent work shows that a class of neuron models, which includes the quadratic integrate-and-fire (QIF) neuron, avoids these discontinuities and enables continuous and even smooth spike-based gradient descent. However, it remains unclear whether these advantages translate into practice. Here, we demonstrate that they do so via a controlled comparison between networks of LIF and QIF neurons on the popular Spiking Heidelberg Digits dataset. Specifically, in a first step, we perform a thorough hyperparameter search to optimize both models, revealing a clear performance advantage of QIF neurons. In a second step, we visualize the loss and gradient landscapes. Consistent with their inferior performance, we find that the loss landscapes of LIF neurons, which are discontinuous, appear more fragmented and the related gradients more erratic. An analysis of the landscapes of single samples indicates that these features arise from changes in the temporal order of spikes, which often cause disruptive spike (dis)appearances. Overall, our results advocate replacing LIF neurons with neuron models exhibiting continuous spiking dynamics, such as QIF neurons, for gradient descent training.
2026-06-01 | Yumiao Zhao, Bo Jiang, Beibei Wang et al.
Visual Prompting (VP) has emerged as an efficient paradigm for adapting large-scale pre-trained vision models to downstream tasks by incorporating learnable prompts at the input level. However, existing VP methods typically employ dense pixel-level prompts, which often suffer from redundant perturbations, limited generalization and energy inefficiency. To overcome these limitations, we propose to integrate brain-inspired spiking learning into visual prompt learning tasks. As we know that spiking neuron can perform inexpensive information processing by transmitting the input data into discrete spike trains and return sparse outputs. Inspired by this, we propose \textbf{Lo}w-\textbf{R}ank visual \textbf{S}pike \textbf{P}rompting (LoRSP), a novel framework that learns dynamic low-rank sparse visual prompts naturally via a Spiking neuron learning mechanism. The core idea of LoRSP is to exploit the brain-inspired sparse firing mechanism of spiking neurons to generate pixel-level sparse prompt for each instance. To be specific, we first construct a series of prompt factors via low-rank factorization to capture distinct prompt subspaces. These prompt factors are then fed into an SNN architecture, which performs the integrate-and-fire process to emit spikes. As a result, our LoRSP generates a \emph{sparse} visual prompt while maintaining the low-rank constraint. This design enables instance-specific selective prompting, leading to more compact and robust adaptation across diverse downstream tasks. Extensive experiments on five heterogeneous vision backbones and multiple benchmarks demonstrate that LoRSP achieves competitive performance while requiring fewer tunable parameters compared to existing VP methods.
2026-06-01 | Yuliya Tsybina, Ivan Y. Tyukin, Alexander N. Gorban et al.
Live neural systems demonstrate remarkable capabilities to learn new behavior and patterns from mere few examples and are known to operate robustly under severe sensory noise. These capabilities, however, remain largely out of reach for modern artificial neural networks, including deep learning models. We show that this gap can be bridged by embedding novel genuine neuromorphic circuits into conventional artificial neural network architectures. These circuits comprise astrocytic modulation and spiking dynamics inherent to biological neural structures. Tested across standard benchmarks representing tasks of varying complexity, the hybrid models achieve high accuracy from few training examples per class and sustain high performance under occlusion and impulse noise that cause performance collapse in standard models without neuromorphic adaptation. We term this phenomenon neuromorphic supremacy - a regime in which architectures grounded in neurobiology decisively outperform classical deep learning, pointing toward a principled foundation for perception in embodied AI systems operating in noisy, data-scarce environments.
2026-05-31 | Raj Patel, David Amebley, Taye Akinrele et al.
Network intrusion detection is a core component of modern cybersecurity infrastructure, yet the deep learning models that dominate the field are computationally demanding, motivating interest in lightweight alternatives suited to edge and neuromorphic deployment. Spiking Neural Networks (SNNs) are therefore a natural candidate, but their design space, spanning the choice of neuron model and spike encoding scheme, remains poorly characterized for intrusion detection. We bridge this gap by using a controlled ablation study using 9 neurons coupled with 3 spike encoding schemes, making 27 variants, all implemented on snntorch evaluated over raw inputs with limited preprocessing on four benchmark datasets (NSL KDD, KDDCup99, CIC-IDS2017, and CTU-13) with 5 seeds. We find that spike encoding scheme is a better determinant for detection quality than the neuron model, where rate and delta spike encodings perform worse than latency encoding over the sweep. The LeakyParallel neuron with latency encoding performed the best overall, averaging at 92.11% accuracy and 0.80 macro- F1 at a rate of 2.01% false positives averaged over all 4 datasets, with accuracy close to perfect for CIC-IDS2017 and CTU-13, and also performed the fastest on inference. These results highlight the potential of SNNs as a viable alternative to traditional methods of intrusion detection when considering low-latency or resource-constrained deployments.
2026-05-30 | Srilagna Sahoo, Adwaaiit Pande, Kartikey Thakar et al.
Advanced vision systems require retinomorphic, energy-efficient spike-based preprocessing of dynamic visual scenes. Here, we demonstrate multiple retinal preprocessing functionalities by leveraging a Hodgkin-Huxley-based optical spiking neuron (OSHN) that incorporates a two-dimensional anti-ambipolar phototransistor operated in the subthreshold regime to minimize power consumption. OSHN exhibits wavelength- and intensity-sensitive spike encoding with energy consumption per spike of 0.9 pJ under dark, 2 pJ at 480 nm (mid wavelength, M), and 24.5 pJ at 800 nm (long wavelength, L). The low (biological)-to-high spiking rate (0 - 2 kHz) with substantially faster response times (4.2 $μ$s - 1.25 ms) than the human retina (30 ms - 60 ms), reveal OSHN's fast decision-making capability. OSHN facilitates concurrent spectral-spatial processing by emulating retinal antagonistic center-surround receptive fields (CSRFs) at a single wavelength (480 nm or 800 nm) with varying intensities, visual adaptation (at 480 nm) to prevent system saturation, and L-M cone opponency in midget ganglion cells. Finally, a CSRF-augmented spiking neural network (SNN) has been developed for camouflaged object detection, achieving 4.4%, 10.4%, and 28.4% improvements in accuracy over conventional SNN on FMNIST, COD10K, and synthetic camouflaged datasets, outperforming existing photoactive spiking architectures while enabling event-driven intelligent edge vision systems.
2026-05-30 | Yukuan Zhang, Jiarui Zhao, Shangqing Nie et al.
Cross-modal hashing retrieval encodes heterogeneous data into compact binary codes for efficient Hamming-space search. Existing methods usually learn cross-modal semantics in continuous feature spaces and generate binary codes through a final sign operation, which weakly couples training optimization with discrete hash retrieval. We propose SpikeHash, a unified spiking framework that formulates cross-modal hashing as spike-state evolution, directional spike interaction, and competitive spike readout. Specifically, SpikeHash converts image and text features into multi-timestep spike sequences. In a shared Hamming space, the two spike sequences jointly drive the temporal evolution of a shared hash state. Cross-modal interaction is further performed through directional spike modulation, enabling each modality to influence the firing dynamics of the other. Crucially, SpikeHash replaces the conventional continuous hash head with a positive-negative spiking hash readout, where each hash bit is produced by temporal competition between paired spike channels. Experimental results show that SpikeHash achieves competitive retrieval accuracy on three benchmark datasets while reducing the parameter size, operation count, and estimated energy of the hash learning stage, suggesting a compact spiking alternative to conventional continuous hash mapping. The project page is available at https://shuqiao-111.github.io/.
Dynamics and Representation Structure of Local Approximations to Gradient-Based Learning in Linear Recurrent Neural Networks
2026-05-29 | Ezekiel Williams, Alexandre Payeur, Guillaume Lajoie
Biological and neuromorphic recurrent neural networks (RNNs) are subject to spatial and temporal locality constraints on the information that can plausibly be used during learning. A common strategy to satisfy these constraints is to modify gradient descent by neglecting non-local terms to varying degrees, as in random feedback local online (RFLO) learning and truncated backpropagation through time (tBPTT). However, the learning dynamics of these algorithms, and how they compare with BPTT, remain poorly understood. We apply dynamical systems theory to data-aligned linear RNNs -- whose dynamics can be separated into orthogonal modes -- to compare stationary solutions, stability properties, and convergence rates, finding qualitatively distinct behaviour for RFLO versus BPTT and one-step tBPTT. We further observe that the solutions learned by RFLO are restricted to low-rank perturbations of initial parameters, a result which holds beyond the data-aligned setting. Our work provides analytical insight into how locality constraints shape learning dynamics, with implications for neuroscientific models of learning and alternative optimization approaches for RNNs.
2026-05-31 | Luigi Capogrosso, Pietro Bonazzi, Michele Magno
Earth Observation (EO) is undergoing a significant transformation driven by the deployment of novel sensing technologies. Traditional frame-based optical sensors often struggle with motion blur, high power consumption, and extreme data redundancy in challenging orbital environments. In contrast, event-based sensors, also known as neuromorphic cameras, offer a bio-inspired asynchronous approach. By capturing only local illumination changes, they provide microsecond temporal resolution, an extremely high dynamic range, and exceptional energy efficiency. Although the use of these sensors is rapidly expanding from terrestrial systems to orbital platforms, the scientific literature surrounding their space-based applications remains heavily fragmented. To bridge this gap, this article presents a comprehensive review of the state-of-the-art in event-based vision in the space domain. Based on the retrieved literature, we introduce a taxonomy structured around four primary domains: 1) atmospheric and high-speed observation; 2) environmental monitoring and change detection; 3) operational support and onboard processing; and 4) geospatial modeling and predictive analysis. As a result, this survey highlights that neuromorphic engineering is far more than a supplementary imaging technique; it is a paradigm shift that can be used to directly address critical bottlenecks in modern remote sensing and sustainable space exploration.
Towards Neuromorphic Event-Based Sensing for High-Speed Multi-Spectral Classification and Tracking of Microparticles
2026-05-29 | Joana M. Teixeira, Tomás Lopes, Tiago D. Ferreira et al.
Conventional image-based microfluidic systems face an inherent trade-off between throughput, imaging speed, and data bandwidth, limiting their ability to monitor high-velocity flows without significant motion blur or prohibitive data generation. Event-based sensing has emerged as a high-speed, low-power alternative, but has so far been largely restricted to tracking monodisperse, spherical particles. In this work, we introduce a microfluidic sensing platform that enables the simultaneous extraction of kinematic and spectral information from polydisperse microparticles using a neuromorphic imaging approach. By integrating a spatially multiplexed RGB filter mask with an asynchronous event-based sensor, spectral signature and motion are encoded directly at the sensing stage, eliminating the need for image reconstruction or learning-based inference. The system achieves sub-millisecond temporal resolution and maintains robust classification performance across a broad range of particle sizes and flow velocities, including under non-laminar conditions, reaching up to 82% accuracy for classification of colored particles within the 0.08-0.18 mm range. The event-driven architecture reduces data bandwidth by >240x compared to conventional high-speed imaging, while sustaining an area throughput of 460 mm^2/s. By providing a computationally efficient and low-latency particle characterization, this framework paves the way for a scalable solution towards high-speed, label-free screening of heterogeneous analytes in clinical diagnostics and environmental monitoring.