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[None][feat] Add the PrimTS native sparse MLA FMHA for DeepSeek-V4 generation and enable it by default on SM100 - #20209
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@yunruis — the PrimTS upstream refresh #20155 has merged. Please update this source-update PR before merging it. The new canonical source branch is
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@tensorrt_llm/_torch/attention/backends/fmha/prims_ts_sparse_mla.py:
- Around line 381-413: Update the `_pool_views` cache key in the view-building
flow to use the selected pool’s base pointer and `total_rows` instead of
`id(manager)`, retaining the attention type and compression ratio as needed to
distinguish pools. Ensure managers that reuse an object ID cannot retrieve a
cached view of freed memory.
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3rdparty/vendor_patches/flashinfer-prims-ts.patch3rdparty/vendor_sources.lock.yamltensorrt_llm/_torch/attention/backends/fmha/__init__.pytensorrt_llm/_torch/attention/backends/fmha/prims_ts_sparse_mla.pytensorrt_llm/_torch/attention/backends/fmha/registry.pytensorrt_llm/_torch/attention/backends/sparse/deepseek_v4/metadata.pytests/unittest/_torch/attention/sparse/deepseek_v4/test_prims_ts_sparse_mla_fmha.pytests/unittest/_torch/attention/test_fmha_registry.py
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…e opt-out and MTP rows, add release notes Under the default launcher (`trtllm-llmapi-launch` and the `LLM()` MPI session) every rank owns a private FlashInfer workspace, so the ranks of one host do not share kernel compiles and each fans its warm-up out on its own. The per-rank default of 4 precompile subprocesses therefore started 32 `cute.compile` interpreters on a TP=8 node, each with a CUDA context. The default now follows the ranks on the host: at most 4 per rank and 16 per host together (TP=8 runs 2 per rank); an explicit `TLLM_PRIMTS_WARM_WORKERS` is never capped. The module note documents the host load. The warm-up reads `max_num_requests`, `max_total_draft_tokens` and `max_num_tokens` directly instead of through `getattr(..., 0)`, so a renamed field fails at warm-up instead of silently shrinking the warmed set and moving the MTP row counts' compiles to the first serving step. Tests: the unified DeepSeek-V4 forward test now also runs with `TLLM_FMHA_LIBS=-prims_ts_sparse_mla` and asserts that the TRTLLM-Gen fallback serves generation with PrimTS never entered (the documented opt-out, and what SM103 / fp8_ds_mla / NVFP4 deployments run); the module test's multi-token generation cases (next_n 2 and 6, ragged 1/2/4) run with a spy asserting PrimTS served them with one row per query token; a unit test asserts the warm set covers `requests * (1 + draft)` rows and is bounded by the token budget; the worker-count tests cover the per-host cap. Release notes: the default flip, the opt-out, the first-launch compile cost under per-rank workspaces, the `TLLM_PRIMTS_WARM_*` variables and the `FLASHINFER_DISABLE_JIT=1` behavior. Addresses the review by @brnguyen2 on NVIDIA#20209. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com>
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Thanks @brnguyen2 — all three addressed in c67aa5f (branch also rebased onto
The precompile machinery will be upstreamed to flashinfer; the vendor patch carries it until then. |
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…th worker subprocesses Without a compile cache, the first eager forward of each DeepSeek-V4 layer profile warms every kernel variant the deployment can select (Flash: 12 variants, two kernels each; Pro: 19). FlashInfer's JitSpec.build_and_load() holds the op-family file lock for the whole cute.compile, so the ranks of a launch deduplicate but serialize: the warm-up wall clock is the sum of every variant's compile time regardless of rank count (about 13 min for Flash on B100, 10 min on B200), all of it inside LLM startup. _warm_kernel_variants now probes the on-disk cache (a plan under the new _compile_cache.probe_cached() mode raises KernelNotCached instead of compiling) and, when a variant is missing, hands the deduplicated (rows, extra) list to worker subprocesses first (prims_ts_precompile.py; TLLM_PRIMTS_WARM_WORKERS, default 4, 0/1 disables; TLLM_PRIMTS_WARM_TIMEOUT bounds the wait, default 1800 s). A worker runs the same wrapper.plan() under _compile_cache.precompile_only(), which compiles through JitSpecCuteDsl.compile_and_persist() -- cute.compile outside the module lock, the artifact committed under it -- and returns a placeholder instead of loading. A per-kernel file lock in FlashInfer's tmp directory makes every kernel of a workspace compile once: worker i of N takes payload slots i, i+N, ... first, then goes through the rest skipping kernels another process holds (KernelBusy) and finishes with a blocking pass, so every worker ends with every variant on disk whether the workspace is private to the rank (TRT-LLM's default) or shared between ranks. Workers are plain interpreter subprocesses with the MPI launcher environment removed (split_mpi_env(); importing tensorrt_llm initializes MPI) and the parent's exact sys.path, because the cache key's cute_dsl_version is enumerated from it and a different meta.json makes the parent treat the module as stale and wipe it. Any failure (worker exit, timeout, cache disabled, FLASHINFER_DISABLE_JIT) falls back to the in-process compile that ran before; TLLM_PRIMTS_WARM_STRICT=1 turns it into an error for tests. Measured on dlcluster 4u4g-gen-0097 (B100), cold FLASHINFER_WORKSPACE_BASE: the 12 Flash variants take 770 s in-process versus 264 / 187 / 136 s with 4 / 8 / 12 workers, after which the serving process loads them in 2 s; the DeepSeek-V4-Flash TP4 LLM becomes ready in 827 s instead of 1369 s. A warm cache is unchanged (about 0.2 s per variant, no workers spawned). Tests: the worker entry (own shard first, busy deferral), the runner with a fake subprocess (environment, sys.path, slots, failure / cache-key mismatch / timeout paths), the probe / persist / disabled modes of build_and_load_attention_kernel, worker_count, and the adapter's probe -> fan-out -> fallback -> strict behaviour. AI-assisted. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Signed-off-by: yunruis <205571022+yunruis@users.noreply.github.com>
…equest check per geometry Each eager DeepSeek-V4 decode layer paid about 140 us of host time in the PrimTS sparse MLA adapter forward on B100 (4 ranks, eager, concurrency 8), of which the wrapper's run() was about 100-120 us although the CUDA API work inside it is 13 us (nsys: one cudaLaunchKernelExC, five cuTensorMapEncodeTiled). The rest was Python: argument validation, pool view construction, scalar tensors and the kernel's descriptor arguments, rebuilt on every call although they only depend on the plan, the pools, the scales and the sinks. BatchSparseMLADecodePagedTSWrapper.run now records, at the end of a full unfused BF16 launch with a caller-owned output, everything static for the (pool storage, extra pool storage, sinks address, scales) tuple, and a later validate=False call with the same tuple goes through _run_prepared: it checks and views only the per-call query, index, length and output tensors and launches the same compiled kernel with the recorded arguments, byte-identical to the full path. One plan serves every layer of a model and each layer has its own sinks parameter, so the prepared launches are kept per key (bounded, cleared by plan()); a single slot would be evicted at every layer and never hit. The prepared launch is taken only for the shapes the adapter uses (one query token per row, no packed query, no LSE, no fused output), and it still checks the per-call tensors' device, contiguity and 16-byte alignment. The wrapper change is a generic optimization of the vendored FlashInfer tree; it ships in the vendor patch so the integration lands together and will be sent upstream to flashinfer-ai/flashinfer as a follow-up. _resolve_sparse_mla_plan is memoized: it is a pure function of its arguments, plan() copies the kernel before mutating it, and the warm-up resolves it 128 times per profile. The adapter runs the full _unsupported_reason re-check only when the request geometry (metadata, query shape and dtype, index width, output shape and dtype, fusion flag, token counts) differs from the last accepted call; the manager already selected the library through is_supported(). Attention sinks that are already contiguous FP32 per head (DeepseekV4TrtllmAttention.attn_sink) are passed through, other dtypes are converted once per source tensor. Measured on dlcluster 4x B100 (exclusive node), DeepSeek-V4 Flash, TP4, eager, before -> after: wrapper.run (1x B100 standalone, rows 32): 50 -> 20 us/call adapter forward per layer, host p50 (c8): 141 -> 91 us wrapper.run inside forward (cProfile, cum): 120 -> 48 us/call prepared-launch hits: 0% -> 96% of calls decode ms/step (c8, 960 tokens, host-noisy): 132.3 -> 128.5 The remaining per-call cost is the adapter's own bookkeeping (pool views, contract key, about 50 us) and the compiled launch (13 us of CUDA API). Tests: test_prepared_launch_matches_the_full_path_per_layer (two sinks sharing one plan both hit, bitwise equal to the full path, new pool or sinks address falls back, plan() clears), test_prepared_launch_single_pool_matches_the_full_path (SWA-only layers, extra indices rejected), test_request_check_runs_once_per_geometry and test_sinks_pass_through_or_are_prepared_once_per_layer. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Signed-off-by: yunruis <205571022+yunruis@users.noreply.github.com>
…e opt-out and MTP rows, add release notes Under the default launcher (`trtllm-llmapi-launch` and the `LLM()` MPI session) every rank owns a private FlashInfer workspace, so the ranks of one host do not share kernel compiles and each fans its warm-up out on its own. The per-rank default of 4 precompile subprocesses therefore started 32 `cute.compile` interpreters on a TP=8 node, each with a CUDA context. The default now follows the ranks on the host: at most 4 per rank and 16 per host together (TP=8 runs 2 per rank); an explicit `TLLM_PRIMTS_WARM_WORKERS` is never capped. The module note documents the host load. The warm-up reads `max_num_requests`, `max_total_draft_tokens` and `max_num_tokens` directly instead of through `getattr(..., 0)`, so a renamed field fails at warm-up instead of silently shrinking the warmed set and moving the MTP row counts' compiles to the first serving step. Tests: the unified DeepSeek-V4 forward test now also runs with `TLLM_FMHA_LIBS=-prims_ts_sparse_mla` and asserts that the TRTLLM-Gen fallback serves generation with PrimTS never entered (the documented opt-out, and what SM103 / fp8_ds_mla / NVFP4 deployments run); the module test's multi-token generation cases (next_n 2 and 6, ragged 1/2/4) run with a spy asserting PrimTS served them with one row per query token; a unit test asserts the warm set covers `requests * (1 + draft)` rows and is bounded by the token budget; the worker-count tests cover the per-host cap. Release notes: the default flip, the opt-out, the first-launch compile cost under per-rank workspaces, the `TLLM_PRIMTS_WARM_*` variables and the `FLASHINFER_DISABLE_JIT=1` behavior. Addresses the review by @brnguyen2 on NVIDIA#20209. Co-Authored-By: Claude Fable 5.1 <noreply@anthropic.com> Signed-off-by: yunruis <205571022+yunruis@users.noreply.github.com>
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Description
Impact
prims_ts_sparse_mla(PrimsTSSparseMlaFmha,tensorrt_llm/_torch/attention/backends/fmha/prims_ts_sparse_mla.py): DeepSeek-V4 generation-phase sparse MLA on the vendored PrimTS CuTe DSL kernel (BatchSparseMLADecodePagedTSWrapper, feat(prims-ts): add native two-source sparse MLA flashinfer-ai/flashinfer#5434).DEFAULT_FMHA_LIBSorder:prims_ts_sparse_mla>flashinfer_trtllm_gen>fallback). Selection is logged at info level:FMHA layer N: PrimsTSSparseMlaFmha serves causal requests (...).fp8_ds_mlafooter-scale cache and NVFP4 compressed pools (fallback).TLLM_FMHA_LIBS=-prims_ts_sparse_mla.flashinfer-prims-ts→ yunruis/flashinfertrtllm-prims-ts-dev-20261023@aa709061(canonicaltrtllm-prims-ts-dev-20261012@0e0761ef+ upstreammaincommits touchingflashinfer/attention/prims_ts, byte-identical tomain@3bf6d3202). Also updates the existingprims_ts_block_sparse/prims_tslibraries and brings in the persistent CuTe DSL compile cache (flashinfer [FEAT] Add option to link statically with cublas&curand #6529).[max_num_tokens]buffer; previouslyfp8_ds_mlaonly).Interface / knobs
TLLM_FMHA_LIBS=-prims_ts_sparse_mlaTRTLLM_FLASHINFER_WORKSPACE_PER_PROCESS10shares one compile cache per hostTLLM_PRIMTS_WARM_WORKERS4(capped so a host starts ≤16 workers)0= compile in-processTLLM_PRIMTS_WARM_TIMEOUTFLASHINFER_WORKSPACE_BASE~/.cache/flashinfer.../0.6.18/<arch>/cached_ops/prims_ts_*_cute_dsl/)Notes: the first compile needs the cache directory writable;
FLASHINFER_DISABLE_JIT=1now refuses a cold compile of these kernels.How the backend works
DeepseekV4TrtllmAttention.sparse_attn_predictdirectly ([T, K]int32 rows + per-row lengths; SWA pool primary, compressed pool extra;-1holes handled in-kernel). No page-table conversion, no packing kernel.softmax_scale = attn_scale * q_descale * kv_descale,output_scale = kv_descale), read once at eager warm-up, never under graph capture.[G, T, (H/G)*512]/[G, (H/G)*4, pad4(T)]block-128 E4M3 + FP32-scale layout.TrtllmAttentionMetadata.fmha_plan_caches["prims_ts_sparse_mla"]: one plan per static profile shared by all layers of a metadata object, one shared workspace. First eager forward per profile warms all kernel variants once per process; index contract validated once per process; nothing planned or validated under capture.sparse_mla_swa_lens,sparse_mla_extra_lens[ratio]) derived once per step in the DSv4 metadata; no per-layer helper kernels.run()memoizes the static launch state per (pool, extra pool, sinks, scales) tuple and latervalidate=Falsecalls take_run_prepared. B100 TP4 eager c8: adapter host p50 per layer 141 → 91 µs, decode 132.3 → 128.5 ms/step; CUDA-graph steps unchanged. Ships inflashinfer-prims-ts.patch, to be upstreamed.Vendor patch
flashinfer_apiforflashinfer_experimental_api,trace=arguments dropped (flashinfer-python 0.6.18), absoluteflashinfer.jit/utils/cute_dslimports, relative kernel imports in the sparse plan resolver (guarded bytest_prims_ts_vendored_imports.py)._launch_mla_decodepassesoutput_quant_argspositionally and unconditionally (fix(prims-ts): pass output quantization argument positionally to MLA kernels flashinfer-ai/flashinfer#6843). Without it every kernel reloaded from the persistent cache fails withTypeError: Expects 15 parameters. Covered bytest_reloaded_kernel_accepts_the_same_launch.trtllm.fused_inv_rope_fp8_quant_vllm_portonly on near-zero RoPE channels (D[448:512]), within one quantization step.Performance vs. TRTLLM-Gen fallback
Exclusive 4x B200 (umbriel-b200-145), DeepSeek-V4-Flash TP4/EP4 attention-DP,
bench_dsv4_flash_decode.py, 256 output tokens, ms per decode step (lower is better). "short" ≈ 256-token prompts, "long" ≈ 3000-token prompts (top-k saturated).All points within ±3 %. Steady-state attention kernel time is identical with and without the valid-prefix plan hint (torch.profiler). Raw numbers:
dsv4-trtllm-logs/e2e/exclB200_*.json,A-agent_flow/DSV4-trtllm/trace/perf_history.csv.Startup time (default launcher, per-rank workspaces,
LLM()ready time, exclusive nodes)TLLM_PRIMTS_WARM_WORKERS=4 / 8measure the same (872 / 860 s) and0(in-process) is 1040 s.CI history
sqrt(512/192)in the unit-test scenario (fixed,_softmax_scale); GB300 perf-sanity illegal address (SM103 now unavailable); GB200 2-node DSR1/Kimi failures shared with other PRsTestDeepSeekV4ProDSpark::test_gsm8k_dep8_megamoe_deepgemmOOM in KV-cache estimation (passes on all neighbouring builds)ebba1f199958d2test_forward_error_survival.pyon CPU stages, main-side (kv_cache_retention_config, fix #20883)8e22202test_mpi_sessionflake (nvbug 6913451); re-trigger refused because of a merge conflict → rebasedc67aa5fc67aa5freruntest_disaggregated_deepseek_v3_lite_fp8_nixl(auth flake, also on #18843 / post-merge),test_llm_partial_update_weights_qwen35_mxfp8(overlap flake, 7/167 on main),TestDeepSeekV4FlashDSpark::test_gsm8k_1p1d_dep4gen worker not ready in 3600 s (same signature on gRPC-only PR #20437 the same day)c67aa5freruntest_gsm8k_1p1d_dep417.9 min (main 11.1-11.9 min, the delta is the gen worker's cold PrimTS compile)Every DeepSeek-V4 / PrimTS test passed on every build from #64663 on (
test_prims_ts_sparse_mla_fmha.py62/62 on DGX_B200,test_deepseek_v4_sparse_mla.py,test_fmha_registry.py,test_prims_ts_vendored_imports.py).Test Coverage
Verified on B200 in the TRT-LLM devel container (CuTe DSL 4.8.0, CUDA 13.4, torch 2.14 nv26.08).
tests/unittest/_torch/attention/sparse/deepseek_v4/test_prims_ts_sparse_mla_fmha.py(added tol0_b200.yml, TIMEOUT 90, excluded from the attention aggregate): registry order and opt-out; softmax-scale derivation; kernel-level fused-output parity vsfused_inv_rope_fp8_quant_vllm_port(bf16 / fp8);test_forward_sparse_mla_unifiedon the default library set with PrimTS asserted to serve generation, parametrized over{prims_ts, fallback};test_forward_sparse_mla_unified_fused_epilogue; speculative-decoding rows (next_n 2 / 6, ragged) on PrimTS; warm-set coverage ofrequests * (1 + draft)rows; per-host precompile worker cap; plan sharing; pool-view lifetime; reloaded-kernel launch; CUDA graph capture / replay with swapped indices; shared-workspace growth. 62 passed on DGX_B200 in CI.tests/unittest/_torch/attention/sparse/deepseek_v4/+test_fmha_registry.py: 578 passed / 28 skipped cold (34 min) and again from the compile cache (2.5 min).test_prims_ts_fmha.py,test_prims_ts_attention_backend.py,sparse/test_prims_ts_block_sparse.pyagainst the new vendored tree: 328 passed cold and 328 passed from the cache (the cache run caught theoutput_quant_argsreload bug).End to end GSM8K (1319 samples):
TestDeepSeekV4Flash::test_auto_dtype(4x B200, TP4/EP4 ADP,autoKV)TLLM_FMHA_LIBS=-prims_ts_sparse_mlaTestDeepSeekV4Pro::test_gsm8k_full_accuracy(8x B200, TP8/EP8 ADP, FP8 KV, MTP 1, padded graphs)TLLM_FMHA_LIBS=-prims_ts_sparse_mlaThe Pro run logs
PrimsTSSparseMlaFmha serves causal requests (generation_seq_len_q<=2, output_dtype=torch.float8_e4m3fn)for all 62 layers on every rank, so the fused E4M3 epilogue and MTP two-token generation are exercised end to end.PR Checklist
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