knowledge: qualify HF Qwen3.5 conv/GDN bindings

docs/reference-matrix.md

@@ -43,6 +43,7 @@ Reading rules:
 | Reference (origin @ revision) | Inspected scope | Accelerator | RAM / Host | SSD / Storage | Communication | OS / System |
 |---|---|---|---|---|---|---|
 | vllm-project/vllm @ `537a79f0fc5ba564d2bef43d54915b2f80f9f77d` (root Apache-2.0; in-file Tri Dao adaptation notice and separate vendored FLA MIT notice) | Direct bounded source inspection, 2026-10-27; Qwen3-Next caller, in-tree conv wrappers, GDN metadata, state shapes, row-resolution helper, selector defaults and two upstream test intents; [source ledger](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/vllm-gdn-causal-conv-contract.md) | mined — effective prefill/decode selection, mixed/speculative phase guards, state-row initialization and accepted-token offset → [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md); [four source cases](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/cases/vllm-gdn-source-contract.md); native execution not_run, agent efficacy not_evaluated | out-of-scope — device state is not host-RAM evidence | out-of-scope | out-of-scope — packed state metadata is not network evidence | out-of-scope — metadata phase classification is not OS scheduling |
+| huggingface/transformers @ `0dad7b822255a0ae261ec45ae937371e859ffd1a` (v5.10.2) and `856157a2f3e9594954310df18fdccc31ffddebe9` (v5.17.0), Apache-2.0 | Bounded source inspection, 2026-10-29: imported Qwen3.5 module, original-package/Hub binding, forward/cache/padding and local numeric contracts; 13 files matched to server Git blobs, [exact readset](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/hf-qwen35-gdn-source.json); two existing worker seams are secondary context only | mined (narrow) — constructor versus global binding, independent conv/GDN fallback, first/cached/chunk phases and cache-free classification conditions → [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md), [contract](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/hf-qwen35-gdn-binding.md) and five source cases; candidate, native/model/numerical/performance not_run, efficacy not_evaluated | out-of-scope — device states do not establish host-memory optimization | out-of-scope | out-of-scope | out-of-scope — layer state is not OS scheduling |
 | NVlabs/kda @ `acdd79343c5e9d0c7cb96289f26fd3f1051ce785` → mit-han-lab/KernelWiki gitlink @ `76d27b56f804e7e7295d4c570e1e5d7eef4b0a75` | Direct bounded distillation, 2026-10-23; cutoff 2026-04-27. All 48 synthesis headers and 2,217 source headers screened; 171 SM90 source headers retained, selected bodies and independently matched DeepGEMM/CUTLASS code plus versioned NVIDIA sections inspected. [Readset/coverage/license qualifications](../src/inferrsi/data/skill_library/hardware/cuda/reason-hopper-kernels/references/sources.md); remaining PR bodies/algorithms unmined; KW pin has no root LICENSE, KDA MIT/sanitization assertions qualified | mined (conditional) — Hopper TMA/mbarrier/WGMMA ownership, resource/layout/pipeline/software scheduling and selected FP8 scaling → [reason-hopper-kernels](../src/inferrsi/data/skill_library/hardware/cuda/reason-hopper-kernels/SKILL.md); SM100 recipes and unsafe snippet generalizations excluded; native/precision/performance not_run | out-of-scope — device registers/SMEM/HBM are not host RAM | out-of-scope — no storage implementation extracted | out-of-scope — CTA/cluster synchronization is not network transport | out-of-scope — tile scheduling is not OS scheduling |
 | antirez/h3.c @ `8974cc055ea9c02fcd14cc27dfda3e1027c05153` (MIT; retained ccv BSD-3-Clause notice) | Direct bounded source distillation, 2026-10-23; 34 selected file bytes matched to pinned Git blobs; [readset/architecture](../src/inferrsi/data/skill_library/repositories/h3-c/audit-h3-runtime-residency/references/source-notes.md). Loader, generation/cache, TE/vision/input-output VAEs, AdaLN, selected Metal/int8/SSD paths and native test assertions; full kernels/driver/media internals unread. Prior model-header observations reused, not rerun | mined — joint audio/video schedule and row-map dependencies, BF16 rounding/fusion versus numerical approximation, actual TensorOps dispatch → [audit-h3-runtime-residency](../src/inferrsi/data/skill_library/repositories/h3-c/audit-h3-runtime-residency/SKILL.md); native/quality/performance not_run | mined — shared/file-backed weights, Qwen prefetch ring, phase/cache/preview overlap and complete host output; tensor counters are not physical footprint or 64 GiB qualification | mined — exact raw BF16/F32 schema, direct/mapped reads and two-slot BF16 matrix streaming with completion/join boundaries; uncached-read request is not measured cache bypass or useful overlap | out-of-scope — local GPU/I/O ordering is not network transport | out-of-scope — no OS scheduling/control implementation extracted |
 | zuiho-kai/h3-metal @ `4ba47a3eabdbebf801ac6664b31f8ec168bc57a8` (inspected MIT; retained BSD-3-Clause notice; machine resolver unavailable) | Bounded source distillation, 2026-10-28; 21 identity-checked files with selected ranges; [scope/readset](../src/inferrsi/data/skill_library/repositories/h3-metal/audit-h3-metal-fasth3-semantics/references/source-notes.md). Fork-specific FastH3 params, tensor/schedule/RoPE and VSA dispatch, test/script limits; full engine/external FastVideo/model surface not mined | mined — requested versus effective controls, ambient conflicts, head-interleaved QKV/FC1 swap/BF16 schedule, real partial VSA tiles/double top-k and dense-plus-coarse fallback → [audit-h3-metal-fasth3-semantics](../src/inferrsi/data/skill_library/repositories/h3-metal/audit-h3-metal-fasth3-semantics/SKILL.md); native/numerical/quality/performance not_run | out-of-scope — tile arithmetic is not measured host footprint or memory-fit qualification | out-of-scope — FastH3 disables requested SSD parameter; no new storage optimization or payload validation | out-of-scope — local attention/dispatch is not network transport | out-of-scope — runtime selection is not OS scheduling |

docs/searchspace-matrix.md

@@ -41,6 +41,7 @@ The primary compute and HBM resource. Most current work lives here.
 | **Configure** | Model adapter: FP8 dequantization, KV-head replication, multimodal feature validation order | `ascend-model-adaptation` | vllm-ascend FP8/multimodal lessons; [separate runtime-wrapper route](../src/inferrsi/data/skill_library/README.md#vllm-ascend-version-and-responsibility-routing) | vllm-ascend @ bc8115ed | 🟢 |
 | **Optimize** | Kernel-level: Triton/CuTe/TileIR writing, kernel tuning, fusion scope analysis | `kernel-writing-guide` | Framework routing (Triton vs CuTe vs AscendC), 6 universal correctness rules, verify-before-benchmark workflow | TRT-LLM kernel-triton-writing + kernel-cute-writing @ f33e0e5f | 🟢 |
 | **Diagnose / Configure / Verify** | Existing causal depthwise convolution: API/state ownership, dtype/layout/packed boundaries, gathered rows, circular cursor and build/binding evidence | [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md) | [Five forward/update decision cases](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/cases/causal-conv1d-dispatch-state.md); invalid layout/state and unproved dispatch stop qualification | Dao-AILab/causal-conv1d @ cd81f0413cad2fc1e6f17e785ac39f59aae690cd; [contract/readset](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/causal-conv1d-contract.md); source and test intent only | Candidate; native/build/binary compatibility, downstream readiness, numerics, performance and efficacy not evaluated; no new measured coverage |
+| **Diagnose / Configure / Verify** | HF Qwen3.5 conv/GDN binding lifetime, independent fallback, dense history/recurrent state and cache-free classification-prefill limits | [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md) | [Two-release contract](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/hf-qwen35-gdn-binding.md) and [five source cases](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/cases/hf-qwen35-gdn-binding.md); resolve actual method/callable and prior state before reuse | Transformers v5.10.2 @ 0dad7b822255a0ae261ec45ae937371e859ffd1a and v5.17.0 @ 856157a2f3e9594954310df18fdccc31ffddebe9; selected HF source only | Candidate; native/model/numerical/device/performance not_run, efficacy not_evaluated; no new measured coverage |
 | **Diagnose / Configure / Verify** | AKG static CUDA Affine loop tails: effective target/option gates, full point-loop bounds and protected input/output accesses | [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md) | [Tail-guard reference](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/references/akg-affine-tail-guards.md): separation precedence, non-divisible fixture and diagnostic boundary | AKG @ 5aa15f3fe4d856eb60cd3b27447e04f5f1fb4dff; source + FileCheck expectations only | Candidate; compiler/IR command, CUDA runtime and agent efficacy not run; no new measured coverage |
 | **Optimize** | Operator-level: staged accuracy-gated tuning campaign (code-level → scheduling → instruction-level), metric→action routing; AscendC tiling design per operator class (reduction/broadcast/elewise/matmul/conversion) | `ascend-operator-tuning`, `ascendc-tiling-design` | PyPTO frontend/swimlane/incore playbooks; fullload-vs-split, four-element tiling template, chip-generation (DAV_2201/3510) routing | awesome-ascend-skills pypto-op-perf-tune + ascendc-tiling-design @ 75ec89c | 🟢 |
 | **Optimize** | Casebook of past NPU optimization decisions: AI-CPU fallback, memory-bound, comm-exposed, graph-compilation, scheduling idle gaps | `ascend-optimization-casebook`, `inference-optimization-casebook` | Five bottleneck classes with symptom→diagnosis→action→evidence schema | MindIE-SD profiling-analyze + dit-perf-opt + perf-gate + dit-parallel-opt @ 8481d39b | 🟢 |

docs/skill-coverage.md

@@ -4,7 +4,7 @@ Generated from the registry, the skill sidecars and the two maintained
 matrices. **Do not edit by hand**; regenerate after any registry, skill,
 matrix or frozen-plan change.
 
-- Input digest: `sha256:1097fe0048b03e8d8fa4ad6ef5cd5c02262602fa7d31c9bb9402bc7e91826031`
+- Input digest: `sha256:38d1f3677af9f97548d58fc898edd28161ce37ecb1413f9707618c6d431cfc3b`
 - Regenerate: `python tools/build_skill_coverage.py`
 - Verify without writing: `python tools/build_skill_coverage.py --check`
 
@@ -126,7 +126,7 @@ optimization is fully covered or that any procedure has measured benefit.
 | [evaluate-elastic-serving-placement](../src/inferrsi/data/skill_library/methods/evaluate-elastic-serving-placement/SKILL.md) | common | Compare migrating an LLM request between model replicas with changing its sequence-parallel execution group, including ... | 1 Accelerator · Diagnose / Configure / Optimize / Verify<br>2 RAM/Host · Diagnose / Configure / Optimize / Verify<br>4 Network · Diagnose / Configure / Optimize / Verify | 1 · Systems sources (Llumnix — [2406.03243v1](https://arxiv.org/abs/2406.03243v1)) | candidate · not_run · 1 readset(s) | no-eval |
 | [inference-benchmark-design](../src/inferrsi/data/skill_library/methods/inference-benchmark-design/SKILL.md) | common | Select task quality gates, reference parity checks and performance workloads for text, agentic coding, work agents ... | — | 2 · Methodology and corpus references (JiusiServe/vllm-evolve @ 43cc82c)<br>Task-specific benchmark selection (issue #60) ([Issue #60 report](https://github.com/InferMatrixLab/InferRSI/issues/6 ...) | candidate · not_run · 2 readset(s) | no-SearchSpace-layer |
 | [inference-optimization-casebook](../src/inferrsi/data/skill_library/methods/inference-optimization-casebook/SKILL.md) | common | How to structure and use a casebook of past optimization decisions as a decision-support tool. Extracts the casebook ... | 1 Accelerator · Optimize | 1 · Systems sources (NVIDIA/TensorRT-LLM @ f33e0e5fd) | candidate · not_run · 0 readset(s) | no-eval |
-| [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md) | common | Decision guide for writing custom inference kernels: when to write one, which framework to choose (Triton, CuTe DSL ... | 1 Accelerator · Optimize / Diagnose / Configure / Verify | 1 · Systems sources (Dao-AILab/causal-conv1d @ `cd81f0413cad2fc1e6f17e785ac39f59aae690cd` ...)<br>1 · Systems sources (NVIDIA/TensorRT-LLM @ f33e0e5fd)<br>1 · Systems sources (mindspore-ai/akg @ `5aa15f3fe4d856eb60cd3b27447e04f5f1fb4dff` ...)<br>1 · Systems sources (vllm-project/vllm @ `537a79f0fc5ba564d2bef43d54915b2f80f9f77d` (root ...) | candidate · not_run · 3 readset(s) | no-eval |
+| [kernel-writing-guide](../src/inferrsi/data/skill_library/methods/kernel-writing-guide/SKILL.md) | common | Decision guide for writing custom inference kernels: when to write one, which framework to choose (Triton, CuTe DSL ... | 1 Accelerator · Optimize / Diagnose / Configure / Verify | 1 · Systems sources (Dao-AILab/causal-conv1d @ `cd81f0413cad2fc1e6f17e785ac39f59aae690cd` ...)<br>1 · Systems sources (NVIDIA/TensorRT-LLM @ f33e0e5fd)<br>1 · Systems sources (huggingface/transformers @ `0dad7b822255a0ae261ec45ae937371e859ffd1a` ...)<br>1 · Systems sources (mindspore-ai/akg @ `5aa15f3fe4d856eb60cd3b27447e04f5f1fb4dff` ...)<br>1 · Systems sources (vllm-project/vllm @ `537a79f0fc5ba564d2bef43d54915b2f80f9f77d` (root ...) | candidate · not_run · 5 readset(s) | no-eval |
 | [optimization-search-policy](../src/inferrsi/data/skill_library/methods/optimization-search-policy/SKILL.md) | common | Policy for how an optimization agent should select, order, and stop optimization experiments. Covers candidate ... | 1 Accelerator · Optimize | 2 · Methodology and corpus references (JiusiServe/vllm-evolve @ 43cc82c)<br>2 · Methodology and corpus references (RRSI — arXiv 2609.24972v3)<br>2 · Methodology and corpus references (arXiv 2608.01867 (CRISP))<br>2 · Methodology and corpus references (microsoft/SkillOpt @ 343db22) | candidate · not_run · 6 readset(s) | no-eval |
 | [performance-ceiling-analysis](../src/inferrsi/data/skill_library/methods/performance-ceiling-analysis/SKILL.md) | common | Estimate optimization headroom before modifying an inference system. Produces a three-level ceiling model (analytical ... | 1 Accelerator · Diagnose / Verify<br>5 OS · Configure | 1 · Systems sources (NVIDIA/TensorRT-LLM @ f33e0e5fd)<br>1 · Systems sources (ebugger/Empirical-Roofline-Toolkit @ 0771fa9)<br>1 · Systems sources (hahnyuan/LLM-Viewer @ 1893e4b) | candidate · not_run · 16 readset(s) | no-eval |
 | [plan-activation-residency](../src/inferrsi/data/skill_library/methods/plan-activation-residency/SKILL.md) | common | Propose training activation and gradient memory reductions by distinguishing lifetime reordering, address packing and ... | 1 Accelerator · Diagnose / Optimize / Verify | 1 · Systems sources (Checkmate — [1910.02653v3](https://arxiv.org/abs/1910.02653v3)) | candidate · not_run · 1 readset(s) | no-eval |

src/inferrsi/data/repo_packs/inferrsi/knowledge/README.md

@@ -15,7 +15,7 @@ These are knowledge abstracts (`--kind knowledge`), with namespaced package
 IDs distinct from explicitly selected `checkout_ref` skills. Ascend/CUDA
 procedures use their corresponding backend; shared methods use `common`.
 
-Source snapshot: [c438136ae06f0318d21784c37d4d156597e67b1c](https://github.com/InferMatrixLab/InferRSI/tree/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library).
+Source snapshot: [b24d3525755376d2b0a5184ce66526b120729e6e](https://github.com/InferMatrixLab/InferRSI/tree/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library).
 
 ```bash
 inferrsi knowledge search 'profiling' --repo-type inferrsi --limit 50
@@ -29,7 +29,7 @@ contain the current input paths and bytes (Git checkout filters are respected).
 
 ```bash
 python tools/build_skill_index.py --source-revision <committed-source-revision>
-python tools/build_skill_index.py --source-revision c438136ae06f0318d21784c37d4d156597e67b1c --check
+python tools/build_skill_index.py --source-revision b24d3525755376d2b0a5184ce66526b120729e6e --check
 ```
 
 `--check` detects missing, stale and unexpected generated records without writing.

src/inferrsi/data/repo_packs/inferrsi/knowledge/ascend/skills/ascend-aclgraph-capture-replay.json

@@ -21,8 +21,8 @@
   "sources": [
     {
       "type": "git",
-      "url": "https://github.com/InferMatrixLab/InferRSI/blob/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library/hardware/ascend/ascend-aclgraph-capture-replay/SKILL.md",
-      "commit": "c438136ae06f0318d21784c37d4d156597e67b1c",
+      "url": "https://github.com/InferMatrixLab/InferRSI/blob/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library/hardware/ascend/ascend-aclgraph-capture-replay/SKILL.md",
+      "commit": "b24d3525755376d2b0a5184ce66526b120729e6e",
       "paths": [
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-aclgraph-capture-replay/SKILL.md",
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-aclgraph-capture-replay/metadata.json",

src/inferrsi/data/repo_packs/inferrsi/knowledge/ascend/skills/ascend-device-health.json

@@ -23,8 +23,8 @@
   "sources": [
     {
       "type": "git",
-      "url": "https://github.com/InferMatrixLab/InferRSI/blob/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library/hardware/ascend/ascend-device-health/SKILL.md",
-      "commit": "c438136ae06f0318d21784c37d4d156597e67b1c",
+      "url": "https://github.com/InferMatrixLab/InferRSI/blob/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library/hardware/ascend/ascend-device-health/SKILL.md",
+      "commit": "b24d3525755376d2b0a5184ce66526b120729e6e",
       "paths": [
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-device-health/SKILL.md",
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-device-health/metadata.json",

src/inferrsi/data/repo_packs/inferrsi/knowledge/ascend/skills/ascend-distributed-parallel.json

@@ -24,8 +24,8 @@
   "sources": [
     {
       "type": "git",
-      "url": "https://github.com/InferMatrixLab/InferRSI/blob/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library/hardware/ascend/ascend-distributed-parallel/SKILL.md",
-      "commit": "c438136ae06f0318d21784c37d4d156597e67b1c",
+      "url": "https://github.com/InferMatrixLab/InferRSI/blob/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library/hardware/ascend/ascend-distributed-parallel/SKILL.md",
+      "commit": "b24d3525755376d2b0a5184ce66526b120729e6e",
       "paths": [
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-distributed-parallel/SKILL.md",
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-distributed-parallel/metadata.json",

src/inferrsi/data/repo_packs/inferrsi/knowledge/ascend/skills/ascend-graph-mode.json

@@ -22,8 +22,8 @@
   "sources": [
     {
       "type": "git",
-      "url": "https://github.com/InferMatrixLab/InferRSI/blob/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library/hardware/ascend/ascend-graph-mode/SKILL.md",
-      "commit": "c438136ae06f0318d21784c37d4d156597e67b1c",
+      "url": "https://github.com/InferMatrixLab/InferRSI/blob/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library/hardware/ascend/ascend-graph-mode/SKILL.md",
+      "commit": "b24d3525755376d2b0a5184ce66526b120729e6e",
       "paths": [
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-graph-mode/SKILL.md",
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-graph-mode/metadata.json",

src/inferrsi/data/repo_packs/inferrsi/knowledge/ascend/skills/ascend-model-adaptation.json

@@ -22,8 +22,8 @@
   "sources": [
     {
       "type": "git",
-      "url": "https://github.com/InferMatrixLab/InferRSI/blob/c438136ae06f0318d21784c37d4d156597e67b1c/src/inferrsi/data/skill_library/hardware/ascend/ascend-model-adaptation/SKILL.md",
-      "commit": "c438136ae06f0318d21784c37d4d156597e67b1c",
+      "url": "https://github.com/InferMatrixLab/InferRSI/blob/b24d3525755376d2b0a5184ce66526b120729e6e/src/inferrsi/data/skill_library/hardware/ascend/ascend-model-adaptation/SKILL.md",
+      "commit": "b24d3525755376d2b0a5184ce66526b120729e6e",
       "paths": [
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-model-adaptation/SKILL.md",
         "src/inferrsi/data/skill_library/hardware/ascend/ascend-model-adaptation/metadata.json",