Analog Synthesis for High Level Systems (ASHES)

ASHES is an (in-progress) tool that is capable of programming Field Programmable Analog Arrays (FPAAs) or generating tapout files (.gds) for analog computing applications using a programmable analog standard cell library.

• Check out the initial paper on the tool. Journal
• Learn more about FPAAs. IEEE Link, PDF
• Learn more about the programmable analog standard cell flow across process nodes. 65nm, 130nm

Project Requirements

• Operating system: The project has been tested in a linux environment on an Ubuntu 22 distro.
• Programming Tools: Python3, TK/TCL, Scilab/XCOS and Bash.

Dependencies

The tool can be installed as a standalone package whose outputs stop before the detailed router (Qrouter) for the ASIC flow and before the resource allocator (VTR/VPR) for the FPAA flow. To install dependencies for just the python package run the following line.

pip install numpy verilog-parser

However, to use the full capabilities of the tool please follow the instructions below.

Installation

To install the tool as a local package, follow the following steps

git clone https://github.com/GTIceLab/ashes
cd ashes

python3 -m venv venv
source venv/bin/activate

pip install -e .

To run,

ashes asic /path/to/design.py

or

ashes fpaa /path/to/design.py

Depending on if you want to target an FPAA or synthesize an ASIC

To add std cell def (json or py) from GDS, run,

gen_stdcell_defs <gds_path_input> -json <json_lib_path_output> -pydef <py_defs_path_output> -pn XXX -foundry XXXX

Flags:
-pydef specifies output pydefinition file
-json specifies output json file

(process node and foundry defaults to TSMC 350nm if not overridden)
-pn or --process_node 
-foundry or--foundry 

Notes:
-gds input path input must go first
-foundry is case sensitive
-providing an argument for process node will default to appending ‘nm’ to the end. <130> or <130nm> are acceptable

ASIC Flow: Detailed Router

For the detailed router we use the same tool from the open circuit design flow by Tim Edwards. The following instructions are copied verbatim from the qrouter repository. The tool has been tested using version 1.4.

Download qrouter here

Double check you have all the dependencies installed

sudo apt-get install tcl8.5-dev
sudo apt install tk-dev
sudo apt-get install libxt-dev

After downloading the Qrouter repository, cd into the folder then run the following commands

./configure
make
make install

FPAA Flow: RASP30 Tool

The RASP30 tools are an earlier GUI based tool that evolved solely to program the 3.0 generation of FPAAs. Check out the journal to learn more. As a result, ASHES incorporates a lot of that structure for its purely text-based flow. The repository comes with VPR but requires the installation of Scilab.

• Download the rasp30 repository here
• Download and install Scilab 5.5.2 here

Or reach out to the lab PI for a copy of a VM with rasp30 and scilab pre-installed.

Usage

1. Use examples to program a circuit to the FPAA.

import ashes_fg as af
from ashes_fg.examples import ors_buffer

af.fpaa.compile(ors_buffer, project_name='ors_buffer', chip_num=13)

Or define your own circuits using the class library.

def ors_buffer():
    inpad1 = fg.inpad([5])
    buff_out = fg.ota_buf(inpad1)
    outpad = fg.outpada(buff_out, [6])

2. Use examples to generate an ASIC layout.

import ashes_fg as af
from ashes_fg.examples import the_small_asic_v2

af.asic.compile(the_small_asic_v2, project_name='asic_alice')

Or similarly create custom designs from the standard cell library

def small_classifier(vector_in):
    vmm = fg.vector_matrix_multiply(vector_in, dims=(1,6))
    wta = fg.wta_direct_vmm(vmm, vmm, vmm, vmm, num_instances=1)
    scan = fg.scanner(wta, wta, wta, wta, num_instances=1)
    return vmm, wta, scan

def the_small_asic_v2():
    afe = fg.fixed_size_afe(None)
    vector_in = [afe]
    vmm, wta, scan = small_classifier(vector_in)
    return vmm, afe, wta, scan

Outputs

• FPAA Programming
  • Without the rasp30 repo, the tool can produce up to the .blif netlist.
  • With the repo and an FPAA board, the tool can generate the final switchlist which it would subsequently program the connections on the device.
• ASIC Synthesis
  • Without the detailed router, the tool can generate placement and write out that gds to <project_name>_placed.gds.
  • With the detailed router installed, it will create the final routed version <project_name>_merged.gds.
• To view .gds output, download klayout or import into a viewer of your choice.

Building documentation site (For developers only)

The following instructions details how to setup and build a local site for the ASHES documentation. This documentation site is built with Mkdocs with the Material theme.

1. Navigate to the directory ashes/
2. Execute python -m venv .env to create a Python virtual environment.
3. Execute source .env/bin/activate to activate the environment.
4. Execute python -m pip install -r requirements.txt to install necessary dependencies for mkdocs.
5. Execute mkdocs build to build the documentation site after any updates to the docstrings or markdown files under docs/.
6. Now, you have two options
   • Execute mkdocs serve to setup a locally hosted site on you local machine.
   • Execute mkdocs gh-deploy to upload your changes to the deployed documentation page here