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feat(core): support configurable f32/f64 precision for Cortex-M single-precision FPUs - #27
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…e-precision FPUs - Introduce Real type alias in src/common.rs (defaults to f64, switches to f32 with feature single-precision) - Implement FloatOps for f32 with Newton-Raphson sqrt under #![no_std] - Generalize filter state, covariance, and observation types across all modules (linear, robust, unscented, eskf, fusion, stats, ffi) - Add AEGIS_SINGLE_PRECISION and aegis_real abstraction in include/aegis_filter.h - Update CI workflow with bare-metal Cortex-M f32 compilation and test validation - Closes #23
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Summary
Closes #23
Introduces a configurable floating-point precision architecture across
aegis-filter. By default, the crate retains maximum double-precisionf64headroom for aerospace and desktop environments. Enabling the opt-in cargo featuresingle-precisionswitches core matrix arithmetic, filter states, covariances, and FFI bindings to single-precisionf32.This eliminates 5x–15x CPU software emulation penalties on ARM Cortex-M4 and Cortex-M33 flight controllers equipped only with single-precision hardware FPUs.
Key Changes
src/common.rs):Realtype alias (f64by default,f32underfeature = "single-precision").FloatOpstrait implementation tof32, including fast Newton-Raphson square root for#![no_std]targets.Real:src/linear.rs:ScalarKalmanFilterandLinearKalmanFilter<S, M>src/robust.rs:HInfinityFilter1DandAdaptiveFilter1Dsrc/unscented.rs:UnscentedKalmanFilter2Dsrc/eskf.rs:ErrorStateKalmanFilter,Vector3, andQuaternionsrc/fusion.rs:MultiSensorFusion1DandSensorSourcesrc/stats.rs:WindowedStats<N>src/ffi.rs: C-FFI wrapper structs and functionsinclude/aegis_filter.h):aegis_realtypedef (defaults todouble, switches tofloatwhenAEGIS_SINGLE_PRECISIONis defined)..github/workflows/ci.yml):thumbv7em-none-eabihfwith--features single-precision.--features single-precision.Verification