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Enable C5 continuous capture at 4 and 8 MS/s - #24

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hpux735:fix/c5-continuous-capture
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hpux735 wants to merge 1 commit into
ESPARGOS:mainfrom
hpux735:fix/c5-continuous-capture

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@hpux735 hpux735 commented Nov 12, 2026

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Summary

Enable the existing two-bank capture/spectrum engine on ESP32-C5 for native USB, 256 bins, at 4 and 8 MS/s. Other profiles retain snapshot capture and their gap flags.

C5 circular capture works with the C61 dump registers/rate fields and C6 bank mapping. Pulsing the finite-capture trigger after circular start produces a short capture; the shared engine already uses the appropriate clear/start sequence without that pulse.

The important C5-specific constraint is whole-bank ownership: selecting the second destination also makes live heap/ROM data in its upper half inaccessible. This adds an 8 KiB LP-SRAM worker stack and static config/result handoff, reserves only the additional lower 64 KiB destination, and restores ownership before scheduling resumes. Existing SRAM linker assertions remain in place. Snapshot DSP/output reuses reserved bank 1 lower SRAM after finite capture instead of adding a second large BSS workspace or exhausting the remaining heap.

Also reduce C5 packet buffers for startup memory and match the existing bank-rotation targets’ interrupt/task-watchdog defaults. A sustained hardware run exposed a TG0 watchdog reset before the task-watchdog default was corrected.

Validation

Tested on one Waveshare ESP32-C5-LCD-1.47, ESP32-C5HF4 rev 1.0, 48 MHz crystal, 4 MB flash, no PSRAM; CPU 240 MHz, receiver 2412 MHz, pinned IDF 25fe69f946311abdaf9ad56591f25fedbc20ac98.

  • C5 production cross-build passes the SRAM assertions.
  • All 24 advertised USB profiles with both detectors pass 300 ms checks: 48 captures, including 2048-bin snapshots and transitions into/out of circular capture. CRCs, frame gap flags, sample-index ordering, end reports and subsequent command access pass.
  • Four consecutive 60-second circular runs pass: mean/max at both 4 and 8 MS/s. Across those runs: 1,440,038,255 captured pairs, zero status/detail failures, zero dropped frames, zero abandoned units; maximum handoff lateness 1–2 pairs.
  • FFT coverage is approximately 2%, as expected for the scalar window-per-unit backend. Captured pair counts refer to the RF writer, not raw I/Q sent over USB.
  • Host snapshot regression now exercises C5 workspace behavior and USB/UART capability flags alongside C3/C61. The full macOS suite reproduces ten existing calibration subtest linker errors from GNU --wrap being unsupported by Apple ld; the other tests pass. The same linker errors were previously reproduced on untouched upstream.
  • Original board firmware restored and command response verified after hardware tests.

tools/check_spectrum.py --continuous-only allows reproducing sustained checks without running every snapshot profile. Detailed memory layout, results and commands are in docs/esp32c5-continuous.md.

These are bounded measurements on one board/frequency. Hardware index/sentinel checks are not an external RF phase measurement, and this does not establish unlimited-duration stability, higher circular rates, other chip revisions, 5 GHz circular capture, physical UART fallback or LCD coexistence.

@hpux735 hpux735 closed this Nov 12, 2026
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