board: synergy map since #1579 (#1580–#1591); #1591 arc; D-CGW decisions

[AdaWorldAPI]

Docs and board only; nothing built.

• New entry 2026-10-16-synergy-map-since-1579.md: revises every point of the board: synergy map since 2026-10-11, status sweep, #1575 record #1579 map (A–F, X1–X19, D1–D8) against merges hydrate: move zip from 2 to 9 (every 2.x release is yanked; main is red) #1580–deepnsm-v2 wire: every CE64 field of a parsed triple from its source, Gadamer gate first; plan D-CGW-0..12 #1591, lists what each merge closed and opened, eight synergies between the arcs, and low / high / heavy fruit.

  • D2 (one preimage op) is closed as a violation (board: mark the gather designs as violations; point at D-HOLO H14c/H14d #1590); H2 withdrawn.
  • L6 closed ([harvest — do not merge] nal W4 (D-NALP-4): exact truth-law oracle and measurement, kept as a reminder #1544 closed); X17 and D8 partly closed by docs: rev-pin template, TD-POPCNT, AVX2 oracle note; OpenCog oracle and lance-graph-cog decisions #1582; TD-POPCNT (b) closed.
  • Still loose: aarch64 guard, X11 fused-mul_add doc pair, X19 lance-graph-java tier and handshake, 18 uncovered parity types.

• deepnsm-v2 wire: every CE64 field of a parsed triple from its source, Gadamer gate first; plan D-CGW-0..12 #1591 arc entry and LATEST_STATE section.

• STATUS rows record the 2026-10-16 decisions: D-CGW-1 (43..45 amended to orientation, own test-first PR), D-CGW-9 (activation becomes a row field), D-CGW-14 (OpenPSI modulators only); D-ASM-11A notes ndarray D-SDR-3/4/5 + sprint-log-4 governance + sprint 5-9 roadmap #364 closed unmerged.

• .cargo/config.toml: the note that read "Anything below v3 still SIGILLs" now names the two arms below v3 (AVX without AVX2 → simd_avx.rs, x86-64-v2 → simd_scalar.rs, each selected by an explicit target-cpu) and says that a build with no target-cpu compiles the AVX2 arm, which ndarray's startup cpu_guard refuses to start on a CPU without AVX2. Comment only.

Harvest: two Haiku cards (merge map, quotes), spot-checked on the main thread (ledger in §7).

---

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