Repository navigation
Expand file tree
/
Copy pathdue-i2c-blocking.cpp
More file actions
314 lines (284 loc) · 10.5 KB
/
Copy pathdue-i2c-blocking.cpp
File metadata and controls
314 lines (284 loc) · 10.5 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
// I2C routines without interrupt/DMA (blocking!) for ATSAM3X8E
// $Id$
#include <due-i2c-blocking.h>
#include <omower-defs.h>
uint16_t i2cWriteOne(uint8_t bus, uint8_t device, uint8_t address, uint8_t data) {
uint8_t buf[1];
buf[0] = data;
return i2cWrite(bus, device, address, buf, 1);
} // uint16_t i2cWriteOne(uint8_t bus, uint8_t device, uint8_t address, uint8_t data)
uint16_t i2cWriteOneNa(uint8_t bus, uint8_t device, uint8_t data) {
uint8_t buf[1];
buf[0] = data;
return i2cWriteNa(bus, device, buf, 1);
} // uint16_t i2cWriteOneNa(uint8_t bus, uint8_t device, uint8_t data)
// Write a data to i2c
uint16_t i2cWriteEx(uint8_t bus, uint8_t device, uint8_t address, boolean needAddress,
uint8_t *data, uint16_t count) {
unsigned int status;
unsigned int timeoutCounter;
if (bus) {
// reset status register
status = WIRE1_INTERFACE->TWI_SR;
// set device and internal address (1 byte)
WIRE1_INTERFACE->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS;
WIRE1_INTERFACE->TWI_MMR = 0;
WIRE1_INTERFACE->TWI_MMR = TWI_MMR_DADR(device) | ((1 << TWI_MMR_IADRSZ_Pos) & TWI_MMR_IADRSZ_Msk);
if (needAddress) {
WIRE1_INTERFACE->TWI_IADR = 0;
WIRE1_INTERFACE->TWI_IADR = address;
}
// Send data bytes
for (uint16_t i = 0; i < count; i++) {
WIRE1_INTERFACE->TWI_THR = data[i];
if (i == (count - 1))
WIRE1_INTERFACE->TWI_CR = TWI_CR_STOP;
timeoutCounter = 0;
while (1) {
status = WIRE1_INTERFACE->TWI_SR;
if (status & TWI_SR_TXRDY)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER) {
WIRE1_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
}
}
timeoutCounter = 0;
// Wait for transfer complete
while (1) {
status = WIRE1_INTERFACE->TWI_SR;
if (status & TWI_SR_TXCOMP)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER)
return count - 1;
}
} else {
// reset status register
status = WIRE_INTERFACE->TWI_SR;
// set device and internal address (1 byte)
WIRE_INTERFACE->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS;
WIRE_INTERFACE->TWI_MMR = 0;
WIRE_INTERFACE->TWI_MMR = TWI_MMR_DADR(device) | ((1 << TWI_MMR_IADRSZ_Pos) & TWI_MMR_IADRSZ_Msk);
if (needAddress) {
WIRE_INTERFACE->TWI_IADR = 0;
WIRE_INTERFACE->TWI_IADR = address;
}
// Send data bytes
for (uint16_t i = 0; i < count; i++) {
WIRE_INTERFACE->TWI_THR = data[i];
if (i == (count - 1))
WIRE_INTERFACE->TWI_CR = TWI_CR_STOP;
timeoutCounter = 0;
while (1) {
status = WIRE_INTERFACE->TWI_SR;
if (status & TWI_SR_TXRDY)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER) {
WIRE_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
}
}
timeoutCounter = 0;
// Wait for transfer complete
while (1) {
status = WIRE_INTERFACE->TWI_SR;
if (status & TWI_SR_TXCOMP)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER)
return count - 1;
}
}
return count;
} // void i2cWriteEx(uint8_t bus, uint8_t device, uint8_t address, boolean needAddress,
// uint8_t *data, uint16_t count);
// Write a data to i2c without internal address
uint16_t i2cWriteNa(uint8_t bus, uint8_t device, uint8_t *data, uint16_t count) {
i2cWriteEx(bus, device, 0, false, data, count);
} // uint16_t i2cWrite(uint8_t bus, uint8_t device, uint8_t *data, uint16_t count)
// Write data to i2c with internal address
uint16_t i2cWrite(uint8_t bus, uint8_t device, uint8_t address, uint8_t *data, uint16_t count) {
i2cWriteEx(bus, device, address, true, data, count);
} // uint16_t i2cWrite(uint8_t bus, uint8_t device, uint8_t address, uint8_t *data, uint16_t count)
// Read data from i2c
uint16_t i2cReadEx(uint8_t bus, uint8_t device, uint8_t address, boolean needAddress,
uint8_t *data, uint8_t count) {
unsigned int status;
unsigned int timeoutCounter;
if (bus) {
// reset status register
status = WIRE1_INTERFACE->TWI_SR;
// set device and internal address (1 byte)
WIRE1_INTERFACE->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS;
WIRE1_INTERFACE->TWI_MMR = 0;
WIRE1_INTERFACE->TWI_MMR = TWI_MMR_DADR(device) | ((1 << TWI_MMR_IADRSZ_Pos) & TWI_MMR_IADRSZ_Msk)
| TWI_MMR_MREAD;
if (needAddress) {
WIRE1_INTERFACE->TWI_IADR = 0;
WIRE1_INTERFACE->TWI_IADR = address;
}
// Check if we're receiving just one byte
if (count == 1)
WIRE1_INTERFACE->TWI_CR = TWI_CR_START | TWI_CR_STOP;
else
WIRE1_INTERFACE->TWI_CR = TWI_CR_START;
// Read data from bus
for (uint16_t i = 0; i < count; i++) {
if ((count != 1) && (i == (count - 1)))
WIRE1_INTERFACE->TWI_CR = TWI_CR_STOP;
timeoutCounter = 0;
while (1) {
status = WIRE1_INTERFACE->TWI_SR;
if (status & TWI_SR_RXRDY)
break;
if (status & (TWI_SR_NACK | TWI_SR_ARBLST | TWI_SR_OVRE)) {
WIRE1_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
if (++timeoutCounter > TWI_TIMEOUT_COUNTER) {
WIRE1_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
}
data[i] = WIRE1_INTERFACE->TWI_RHR;
}
timeoutCounter = 0;
// Wait for transfer complete
while (1) {
status = WIRE1_INTERFACE->TWI_SR;
if (status & TWI_SR_TXCOMP)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER)
return count;
}
} else {
// reset status register
status = WIRE_INTERFACE->TWI_SR;
// set device and internal address (1 byte)
WIRE_INTERFACE->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS;
WIRE_INTERFACE->TWI_MMR = 0;
WIRE_INTERFACE->TWI_MMR = TWI_MMR_DADR(device) | ((1 << TWI_MMR_IADRSZ_Pos) & TWI_MMR_IADRSZ_Msk)
| TWI_MMR_MREAD;
if (needAddress) {
WIRE_INTERFACE->TWI_IADR = 0;
WIRE_INTERFACE->TWI_IADR = address;
}
// Check if we're receiving just one byte
if (count == 1)
WIRE_INTERFACE->TWI_CR = TWI_CR_START | TWI_CR_STOP;
else
WIRE_INTERFACE->TWI_CR = TWI_CR_START;
// Read data from bus
for (uint16_t i = 0; i < count; i++) {
if ((count != 1) && (i == (count - 1)))
WIRE_INTERFACE->TWI_CR = TWI_CR_STOP;
timeoutCounter = 0;
while (1) {
status = WIRE_INTERFACE->TWI_SR;
if (status & TWI_SR_RXRDY)
break;
if (status & (TWI_SR_NACK | TWI_SR_ARBLST | TWI_SR_OVRE)) {
WIRE_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
if (++timeoutCounter > TWI_TIMEOUT_COUNTER) {
WIRE_INTERFACE->TWI_CR = TWI_CR_STOP;
return i;
}
}
data[i] = WIRE_INTERFACE->TWI_RHR;
}
timeoutCounter = 0;
// Wait for transfer complete
while (1) {
status = WIRE_INTERFACE->TWI_SR;
if (status & TWI_SR_TXCOMP)
break;
if (++timeoutCounter > TWI_TIMEOUT_COUNTER)
return count;
}
}
return count;
} // uint16_t i2cReadEx(uint8_t bus, uint8_t device, uint8_t address, boolean needAddress,
// uint8_t *data, uint8_t count)
// Read from i2c with internal address
uint16_t i2cRead(uint8_t bus, uint8_t device, uint8_t address, uint8_t *data, uint8_t count) {
return i2cReadEx(bus, device, address, true, data, count);
} // uint16_t i2cRead(uint8_t bus, uint8_t device, uint8_t address, uint8_t *data, uint8_t count)
// Read from i2c without internal address
uint16_t i2cReadNa(uint8_t bus, uint8_t device, uint8_t *data, uint8_t count) {
return i2cReadEx(bus, device, 0, false, data, count);
} // uint16_t i2cReadNa(uint8_t bus, uint8_t device, uint8_t *data, uint8_t count)
// Initialize I2C bus (speed = 100000 or 400000)
void i2cInit(uint8_t bus, uint32_t speed) {
if (bus) {
// spam SCL to reset some strange devices
pinMode(PIN_SCL1, OUTPUT);
pinMode(PIN_SDA1, OUTPUT);
digitalWrite(PIN_SDA1, LOW);
for (int i = 0; i < 256; i++) {
digitalWrite(PIN_SCL1, HIGH);
delayMicroseconds(1);
digitalWrite(PIN_SCL1, LOW);
delayMicroseconds(1);
}
digitalWrite(PIN_SDA1, HIGH);
for (int i = 0; i < 256; i++) {
digitalWrite(PIN_SCL1, HIGH);
delayMicroseconds(1);
digitalWrite(PIN_SCL1, LOW);
delayMicroseconds(1);
}
pinMode(PIN_SCL1, INPUT_PULLUP);
pinMode(PIN_SDA1, INPUT_PULLUP);
pmc_enable_periph_clk(WIRE1_INTERFACE_ID);
PIO_Configure(g_APinDescription[PIN_WIRE1_SDA].pPort,
g_APinDescription[PIN_WIRE1_SDA].ulPinType,
g_APinDescription[PIN_WIRE1_SDA].ulPin,
g_APinDescription[PIN_WIRE1_SDA].ulPinConfiguration);
PIO_Configure(g_APinDescription[PIN_WIRE1_SCL].pPort,
g_APinDescription[PIN_WIRE1_SCL].ulPinType,
g_APinDescription[PIN_WIRE1_SCL].ulPin,
g_APinDescription[PIN_WIRE1_SCL].ulPinConfiguration);
NVIC_DisableIRQ(TWI0_IRQn);
NVIC_ClearPendingIRQ(TWI0_IRQn);
// Disable PDC channel
WIRE1_INTERFACE->TWI_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
TWI_ConfigureMaster(WIRE1_INTERFACE, speed, VARIANT_MCK);
} else {
// spam SCL to reset some strange devices
pinMode(PIN_SDA, OUTPUT);
pinMode(PIN_SCL, OUTPUT);
digitalWrite(PIN_SDA, LOW);
for (int i = 0; i < 256; i++) {
digitalWrite(PIN_SCL, HIGH);
delayMicroseconds(1);
digitalWrite(PIN_SCL, LOW);
delayMicroseconds(1);
}
digitalWrite(PIN_SDA, HIGH);
for (int i = 0; i < 256; i++) {
digitalWrite(PIN_SCL, HIGH);
delayMicroseconds(1);
digitalWrite(PIN_SCL, LOW);
delayMicroseconds(1);
}
pinMode(PIN_SDA, INPUT_PULLUP);
pinMode(PIN_SCL, INPUT_PULLUP);
pmc_enable_periph_clk(WIRE_INTERFACE_ID);
PIO_Configure(g_APinDescription[PIN_WIRE_SDA].pPort,
g_APinDescription[PIN_WIRE_SDA].ulPinType,
g_APinDescription[PIN_WIRE_SDA].ulPin,
g_APinDescription[PIN_WIRE_SDA].ulPinConfiguration);
PIO_Configure(g_APinDescription[PIN_WIRE_SCL].pPort,
g_APinDescription[PIN_WIRE_SCL].ulPinType,
g_APinDescription[PIN_WIRE_SCL].ulPin,
g_APinDescription[PIN_WIRE_SCL].ulPinConfiguration);
NVIC_DisableIRQ(TWI1_IRQn);
NVIC_ClearPendingIRQ(TWI1_IRQn);
// Disable PDC channel
WIRE_INTERFACE->TWI_PTCR = UART_PTCR_RXTDIS | UART_PTCR_TXTDIS;
TWI_ConfigureMaster(WIRE_INTERFACE, speed, VARIANT_MCK);
}
} // void i2cInit(uint8_t bus, uint32_t speed)