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CUDA illegal memory access under sustained c=8 load at seqs=16/ctx=8192, after c=1/2/4 serve cleanly (not #1983) #2028

Description

@localai-bot

At --max-num-seqs 16 --max-model-len 8192 with DFlash2 speculation on, the engine
serves c=1, c=2 and c=4 cleanly and then dies under sustained c=8 load with a CUDA
illegal memory access, roughly 30 requests in.

engine-fatal: EngineCore busy loop threw: vt cuda: cudaMemcpyAsync: an illegal memory access was encountered
async-llm: output handler saw engine death: EngineCore encountered an issue.
sse: stream aborted mid-flight: ...

This is NOT #1983. That issue's own
isolation matrix records --max-model-len 8192 as not crashing (it reports a 360 s
timeout at seqs=32, "no crash"), and its crash fires on the first real request at
seqs=32 / ctx=32768. This one fires at seqs=16 / ctx=8192, after ~30 requests
have completed successfully. #1983 was also measured on main @ 993b62e4e, before
#1999 and #2000 changed KV sizing.

Measured

row/FIX-DFLASH2-CONCURRENCY @ 3d895a202 (= PR #2010), sm_121a, artifact-gated:
vllm-server 101,151,128 B, flash_fwd=1792, SpecDecodeFA2Bf16=1. dgx:gpu0 (GB10),
idle under rc lease 6e1589ea. --num-blocks 3744 (6.00 GiB pool),
--no-enable-prefix-caching, --speculative-config '{"method":"dflash","model":"/draft","num_speculative_tokens":8}',
workload 1024 in / 512 out.

c out tok/s TPOT ms n ok
1 24.84 39.97 8 8
2 40.11 49.05 8 8
4 59.13 62.97 16 16
8 VOID 32 31, failed=1

The c=16 rung never ran; the ladder terminates on a VOID.

Not introduced by #2010. Before that fix c>=2 aborted at the
propose_drafts_block invariant, so c=8 was unreachable and this defect was
unobservable. #2010 exposes it.

The isolation attempt is inconclusive, and found a second defect

Same binary, same pool, --speculative-config removed, c=8: the engine dies during
warmup instead, with a different fault and illegal memory access count 0:

engine-fatal: EngineCore busy loop threw: vt cuda: cudaMalloc: operation not permitted when stream is capturing

filed separately. So "is the IMA in the draft path?" is unanswered — the control
cannot reach the load phase. A valid control needs CUDA graphs disabled, or
compute-sanitizer.

Not diagnosed

No stack trace is emitted despite the message saying "See stack trace (above)"; that
diagnostic gap is part of what makes this expensive to chase.

Found while running the #1574 concurrency ladder for PR #2010. Not fixed in flow: the
fault is in device memory management under concurrency and needs its own spec and a
compute-sanitizer run under a lease.

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