diff --git a/tool/_testcpp/llvm-22.1.8-support/llcppg-system.cfg b/tool/_testcpp/llvm-22.1.8-support/llcppg-system.cfg index a8b2b616..5f47aaf8 100644 --- a/tool/_testcpp/llvm-22.1.8-support/llcppg-system.cfg +++ b/tool/_testcpp/llvm-22.1.8-support/llcppg-system.cfg @@ -1,6 +1,14 @@ { "Name": "/system", "Dir": "./include/llvm/Support", + "Files": [ + "AMDGPUAddrSpace.h", + "AMDHSAKernelDescriptor.h", + "Atomic.h", + "AtomicOrdering.h", + "Compiler.h", + "DataTypes.h" + ], "Class": [], "NonClass": [], "FuncPrefix": ["Llvm"], diff --git a/tool/_testcpp/llvm-22.1.8-support/system/AMDGPUAddrSpace.go b/tool/_testcpp/llvm-22.1.8-support/system/AMDGPUAddrSpace.go new file mode 100644 index 00000000..de4ee816 --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/AMDGPUAddrSpace.go @@ -0,0 +1,78 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +const ( + AMDGPUAS_MAX_AMDGPU_ADDRESS = 9 + // < Address space for flat memory. + AMDGPUAS_FLAT_ADDRESS = 0 + // < Address space for global memory (RAT0, VTX0). + AMDGPUAS_GLOBAL_ADDRESS = 1 + // < Address space for region memory. (GDS) + AMDGPUAS_REGION_ADDRESS = 2 + // < Address space for local memory. + AMDGPUAS_LOCAL_ADDRESS = 3 + // < Address space for constant memory (VTX2). + AMDGPUAS_CONSTANT_ADDRESS = 4 + // < Address space for private memory. + AMDGPUAS_PRIVATE_ADDRESS = 5 + // < Address space for 32-bit constant memory. + AMDGPUAS_CONSTANT_ADDRESS_32BIT = 6 + // < Address space for 160-bit buffer fat pointers. + // < Not used in backend. + AMDGPUAS_BUFFER_FAT_POINTER = 7 + // < Address space for 128-bit buffer resources. + AMDGPUAS_BUFFER_RESOURCE = 8 + // < Address space for 192-bit fat buffer + // < pointers with an additional index. + AMDGPUAS_BUFFER_STRIDED_POINTER = 9 + // < Address space for GS NGG Streamout registers. + AMDGPUAS_STREAMOUT_REGISTER = 128 + // Address space for direct addressable parameter memory (CONST0). + AMDGPUAS_PARAM_D_ADDRESS = 6 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_PARAM_I_ADDRESS = 7 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_0 = 8 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_1 = 9 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_2 = 10 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_3 = 11 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_4 = 12 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_5 = 13 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_6 = 14 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_7 = 15 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_8 = 16 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_9 = 17 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_10 = 18 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_11 = 19 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_12 = 20 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_13 = 21 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_14 = 22 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_CONSTANT_BUFFER_15 = 23 + // Address space for indirect addressable parameter memory (VTX1). + AMDGPUAS_UNKNOWN_ADDRESS_SPACE = -1 +) +const ( + AMDGPU_DWARFAS_GLOBAL = 0 + AMDGPU_DWARFAS_GENERIC = 1 + AMDGPU_DWARFAS_REGION = 2 + AMDGPU_DWARFAS_LOCAL = 3 + AMDGPU_DWARFAS_PRIVATE_LANE = 5 + AMDGPU_DWARFAS_PRIVATE_WAVE = 6 + AMDGPU_DWARFAS_DEFAULT = 0 +) diff --git a/tool/_testcpp/llvm-22.1.8-support/system/AMDHSAKernelDescriptor.go b/tool/_testcpp/llvm-22.1.8-support/system/AMDHSAKernelDescriptor.go new file mode 100644 index 00000000..69181ae7 --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/AMDHSAKernelDescriptor.go @@ -0,0 +1,306 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +import "github.com/goplus/lib/c" + +const ( + AMDHSA_FLOAT_ROUND_MODE_NEAR_EVEN = 0 + AMDHSA_FLOAT_ROUND_MODE_PLUS_INFINITY = 1 + AMDHSA_FLOAT_ROUND_MODE_MINUS_INFINITY = 2 + AMDHSA_FLOAT_ROUND_MODE_ZERO = 3 +) +const ( + AMDHSA_FLOAT_DENORM_MODE_FLUSH_SRC_DST = 0 + AMDHSA_FLOAT_DENORM_MODE_FLUSH_DST = 1 + AMDHSA_FLOAT_DENORM_MODE_FLUSH_SRC = 2 + AMDHSA_FLOAT_DENORM_MODE_FLUSH_NONE = 3 +) +const ( + AMDHSA_SYSTEM_VGPR_WORKITEM_ID_X = 0 + AMDHSA_SYSTEM_VGPR_WORKITEM_ID_X_Y = 1 + AMDHSA_SYSTEM_VGPR_WORKITEM_ID_X_Y_Z = 2 + AMDHSA_SYSTEM_VGPR_WORKITEM_ID_UNDEFINED = 3 +) +const ( + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_SHIFT = 0 + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT_WIDTH = 6 + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WORKITEM_VGPR_COUNT = 63 + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_SHIFT = 6 + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT_WIDTH = 4 + AMDHSA_COMPUTE_PGM_RSRC1_GRANULATED_WAVEFRONT_SGPR_COUNT = 960 + AMDHSA_COMPUTE_PGM_RSRC1_PRIORITY_SHIFT = 10 + AMDHSA_COMPUTE_PGM_RSRC1_PRIORITY_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC1_PRIORITY = 3072 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32_SHIFT = 12 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_32 = 12288 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64_SHIFT = 14 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_ROUND_MODE_16_64 = 49152 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32_SHIFT = 16 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_32 = 196608 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64_SHIFT = 18 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC1_FLOAT_DENORM_MODE_16_64 = 786432 + AMDHSA_COMPUTE_PGM_RSRC1_PRIV_SHIFT = 20 + AMDHSA_COMPUTE_PGM_RSRC1_PRIV_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_PRIV = 1048576 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP_SHIFT = 21 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_DX10_CLAMP = 2097152 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_ENABLE_WG_RR_EN_SHIFT = 21 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_ENABLE_WG_RR_EN_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_ENABLE_WG_RR_EN = 2097152 + AMDHSA_COMPUTE_PGM_RSRC1_DEBUG_MODE_SHIFT = 22 + AMDHSA_COMPUTE_PGM_RSRC1_DEBUG_MODE_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_DEBUG_MODE = 4194304 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE_SHIFT = 23 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX11_ENABLE_IEEE_MODE = 8388608 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_DISABLE_PERF_SHIFT = 23 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_DISABLE_PERF_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX12_PLUS_DISABLE_PERF = 8388608 + AMDHSA_COMPUTE_PGM_RSRC1_BULKY_SHIFT = 24 + AMDHSA_COMPUTE_PGM_RSRC1_BULKY_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_BULKY = 16777216 + AMDHSA_COMPUTE_PGM_RSRC1_CDBG_USER_SHIFT = 25 + AMDHSA_COMPUTE_PGM_RSRC1_CDBG_USER_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_CDBG_USER = 33554432 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX8_RESERVED0_SHIFT = 26 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX8_RESERVED0_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX8_RESERVED0 = 67108864 + AMDHSA_COMPUTE_PGM_RSRC1_GFX9_PLUS_FP16_OVFL_SHIFT = 26 + AMDHSA_COMPUTE_PGM_RSRC1_GFX9_PLUS_FP16_OVFL_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX9_PLUS_FP16_OVFL = 67108864 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX120_RESERVED1_SHIFT = 27 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX120_RESERVED1_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX120_RESERVED1 = 134217728 + AMDHSA_COMPUTE_PGM_RSRC1_GFX125_FLAT_SCRATCH_IS_NV_SHIFT = 27 + AMDHSA_COMPUTE_PGM_RSRC1_GFX125_FLAT_SCRATCH_IS_NV_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX125_FLAT_SCRATCH_IS_NV = 134217728 + AMDHSA_COMPUTE_PGM_RSRC1_RESERVED2_SHIFT = 28 + AMDHSA_COMPUTE_PGM_RSRC1_RESERVED2_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_RESERVED2 = 268435456 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX9_RESERVED3_SHIFT = 29 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX9_RESERVED3_WIDTH = 3 + AMDHSA_COMPUTE_PGM_RSRC1_GFX6_GFX9_RESERVED3 = -536870912 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE_SHIFT = 29 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_WGP_MODE = 536870912 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED_SHIFT = 30 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_MEM_ORDERED = 1073741824 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS_SHIFT = 31 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC1_GFX10_PLUS_FWD_PROGRESS = -2147483648 +) +const ( + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT_SHIFT = 0 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_PRIVATE_SEGMENT = 1 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_SHIFT = 1 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT_WIDTH = 5 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX120_USER_SGPR_COUNT = 62 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX11_ENABLE_TRAP_HANDLER_SHIFT = 6 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX11_ENABLE_TRAP_HANDLER_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_GFX6_GFX11_ENABLE_TRAP_HANDLER = 64 + AMDHSA_COMPUTE_PGM_RSRC2_GFX120_ENABLE_DYNAMIC_VGPR_SHIFT = 6 + AMDHSA_COMPUTE_PGM_RSRC2_GFX120_ENABLE_DYNAMIC_VGPR_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_GFX120_ENABLE_DYNAMIC_VGPR = 64 + AMDHSA_COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_SHIFT = 1 + AMDHSA_COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT_WIDTH = 6 + AMDHSA_COMPUTE_PGM_RSRC2_GFX125_USER_SGPR_COUNT = 126 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X_SHIFT = 7 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_X = 128 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y_SHIFT = 8 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Y = 256 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z_SHIFT = 9 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_ID_Z = 512 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO_SHIFT = 10 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_SGPR_WORKGROUP_INFO = 1024 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID_SHIFT = 11 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID_WIDTH = 2 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_VGPR_WORKITEM_ID = 6144 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_ADDRESS_WATCH_SHIFT = 13 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_ADDRESS_WATCH_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_ADDRESS_WATCH = 8192 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_MEMORY_SHIFT = 14 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_MEMORY_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_MEMORY = 16384 + AMDHSA_COMPUTE_PGM_RSRC2_GRANULATED_LDS_SIZE_SHIFT = 15 + AMDHSA_COMPUTE_PGM_RSRC2_GRANULATED_LDS_SIZE_WIDTH = 9 + AMDHSA_COMPUTE_PGM_RSRC2_GRANULATED_LDS_SIZE = 16744448 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION_SHIFT = 24 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INVALID_OPERATION = 16777216 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE_SHIFT = 25 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_FP_DENORMAL_SOURCE = 33554432 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO_SHIFT = 26 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_DIVISION_BY_ZERO = 67108864 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW_SHIFT = 27 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_OVERFLOW = 134217728 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW_SHIFT = 28 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_UNDERFLOW = 268435456 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT_SHIFT = 29 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_IEEE_754_FP_INEXACT = 536870912 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO_SHIFT = 30 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_ENABLE_EXCEPTION_INT_DIVIDE_BY_ZERO = 1073741824 + AMDHSA_COMPUTE_PGM_RSRC2_RESERVED0_SHIFT = 31 + AMDHSA_COMPUTE_PGM_RSRC2_RESERVED0_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC2_RESERVED0 = -2147483648 +) +const ( + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET_SHIFT = 0 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET_WIDTH = 6 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_ACCUM_OFFSET = 63 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED0_SHIFT = 6 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED0_WIDTH = 10 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED0 = 65472 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT_SHIFT = 16 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_TG_SPLIT = 65536 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED1_SHIFT = 17 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED1_WIDTH = 15 + AMDHSA_COMPUTE_PGM_RSRC3_GFX90A_RESERVED1 = -131072 +) +const ( + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_SHARED_VGPR_COUNT_SHIFT = 0 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_SHARED_VGPR_COUNT_WIDTH = 4 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_SHARED_VGPR_COUNT = 15 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_RESERVED0_SHIFT = 0 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_RESERVED0_WIDTH = 4 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_RESERVED0 = 15 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED1_SHIFT = 4 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED1_WIDTH = 8 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED1 = 4080 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE_SHIFT = 4 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE_WIDTH = 6 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_INST_PREF_SIZE = 1008 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_START_SHIFT = 10 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_START_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_START = 1024 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_END_SHIFT = 11 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_END_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_TRAP_ON_END = 2048 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE_SHIFT = 4 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE_WIDTH = 8 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_INST_PREF_SIZE = 4080 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED2_SHIFT = 12 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED2_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED2 = 4096 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_RESERVED3_SHIFT = 13 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_RESERVED3_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX11_RESERVED3 = 8192 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_GLG_EN_SHIFT = 13 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_GLG_EN_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX12_PLUS_GLG_EN = 8192 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX120_RESERVED4_SHIFT = 14 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX120_RESERVED4_WIDTH = 8 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_GFX120_RESERVED4 = 4177920 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT_SHIFT = 14 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT_WIDTH = 3 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_NAMED_BAR_CNT = 114688 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DYNAMIC_VGPR_SHIFT = 17 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DYNAMIC_VGPR_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DYNAMIC_VGPR = 131072 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_TCP_SPLIT_SHIFT = 18 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_TCP_SPLIT_WIDTH = 3 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_TCP_SPLIT = 1835008 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DIDT_THROTTLE_SHIFT = 21 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DIDT_THROTTLE_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX125_ENABLE_DIDT_THROTTLE = 2097152 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED5_SHIFT = 22 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED5_WIDTH = 9 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_PLUS_RESERVED5 = 2143289344 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED6_SHIFT = 31 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED6_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX10_RESERVED6 = -2147483648 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_PLUS_IMAGE_OP_SHIFT = 31 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_PLUS_IMAGE_OP_WIDTH = 1 + AMDHSA_COMPUTE_PGM_RSRC3_GFX11_PLUS_IMAGE_OP = -2147483648 +) +const ( + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_SHIFT = 0 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_SHIFT = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR = 2 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_SHIFT = 2 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR = 4 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_SHIFT = 3 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR = 8 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_SHIFT = 4 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID = 16 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_SHIFT = 5 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT = 32 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_SHIFT = 6 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE = 64 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED0_SHIFT = 7 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED0_WIDTH = 3 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED0 = 896 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_SHIFT = 10 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32 = 1024 + AMDHSA_KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK_SHIFT = 11 + AMDHSA_KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK_WIDTH = 1 + AMDHSA_KERNEL_CODE_PROPERTY_USES_DYNAMIC_STACK = 2048 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED1_SHIFT = 12 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED1_WIDTH = 4 + AMDHSA_KERNEL_CODE_PROPERTY_RESERVED1 = 61440 +) +const ( + AMDHSA_KERNARG_PRELOAD_SPEC_LENGTH_SHIFT = 0 + AMDHSA_KERNARG_PRELOAD_SPEC_LENGTH_WIDTH = 7 + AMDHSA_KERNARG_PRELOAD_SPEC_LENGTH = 127 + AMDHSA_KERNARG_PRELOAD_SPEC_OFFSET_SHIFT = 7 + AMDHSA_KERNARG_PRELOAD_SPEC_OFFSET_WIDTH = 9 + AMDHSA_KERNARG_PRELOAD_SPEC_OFFSET = 65408 +) + +type AMDHSAKernelDescriptorT struct { + GroupSegmentFixedSize c.Int + PrivateSegmentFixedSize c.Int + KernargSize c.Int + Reserved0 [4]c.Int + KernelCodeEntryByteOffset c.Int + Reserved1 [20]c.Int + ComputePgmRsrc3 c.Int + ComputePgmRsrc1 c.Int + ComputePgmRsrc2 c.Int + KernelCodeProperties c.Int + KernargPreload c.Int + Reserved3 [4]c.Int +} + +const ( + AMDHSA_GROUP_SEGMENT_FIXED_SIZE_OFFSET = 0 + AMDHSA_PRIVATE_SEGMENT_FIXED_SIZE_OFFSET = 4 + AMDHSA_KERNARG_SIZE_OFFSET = 8 + AMDHSA_RESERVED0_OFFSET = 12 + AMDHSA_KERNEL_CODE_ENTRY_BYTE_OFFSET_OFFSET = 16 + AMDHSA_RESERVED1_OFFSET = 24 + AMDHSA_COMPUTE_PGM_RSRC3_OFFSET = 44 + AMDHSA_COMPUTE_PGM_RSRC1_OFFSET = 48 + AMDHSA_COMPUTE_PGM_RSRC2_OFFSET = 52 + AMDHSA_KERNEL_CODE_PROPERTIES_OFFSET = 56 + AMDHSA_KERNARG_PRELOAD_OFFSET = 58 + AMDHSA_RESERVED3_OFFSET = 60 +) diff --git a/tool/_testcpp/llvm-22.1.8-support/system/Atomic.go b/tool/_testcpp/llvm-22.1.8-support/system/Atomic.go new file mode 100644 index 00000000..02ab0b5f --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/Atomic.go @@ -0,0 +1,14 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +import ( + "github.com/goplus/lib/c" + _ "unsafe" +) + +//go:linkname SysMemoryFence C._ZN4llvm3sys11MemoryFenceEv +func SysMemoryFence() + +//go:linkname SysCompareAndSwap C._ZN4llvm3sys14CompareAndSwapEPViii +func SysCompareAndSwap(ptr *c.Int, new_value c.Int, old_value c.Int) c.Int diff --git a/tool/_testcpp/llvm-22.1.8-support/system/AtomicOrdering.go b/tool/_testcpp/llvm-22.1.8-support/system/AtomicOrdering.go new file mode 100644 index 00000000..f42787ad --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/AtomicOrdering.go @@ -0,0 +1,40 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +import "github.com/goplus/lib/c" + +// Atomic ordering for C11 / C++11's memory models. +// +// These values cannot change because they are shared with standard library +// implementations as well as with other compilers. +type AtomicOrderingCABI c.Int + +const ( + AtomicOrderingCABI_Relaxed AtomicOrderingCABI = 0 + AtomicOrderingCABI_Consume AtomicOrderingCABI = 1 + AtomicOrderingCABI_Acquire AtomicOrderingCABI = 2 + AtomicOrderingCABI_Release AtomicOrderingCABI = 3 + AtomicOrderingCABI_AcqRel AtomicOrderingCABI = 4 + AtomicOrderingCABI_SeqCst AtomicOrderingCABI = 5 +) + +// Atomic ordering for LLVM's memory model. +// +// C++ defines ordering as a lattice. LLVM supplements this with NotAtomic and +// Unordered, which are both below the C++ orders. +// +// not_atomic-->unordered-->relaxed-->release--------------->acq_rel-->seq_cst +// \-->consume-->acquire--/ +type AtomicOrdering c.Uint + +const ( + AtomicOrdering_NotAtomic AtomicOrdering = 0 + AtomicOrdering_Unordered AtomicOrdering = 1 + AtomicOrdering_Monotonic AtomicOrdering = 2 + AtomicOrdering_Acquire AtomicOrdering = 4 + AtomicOrdering_Release AtomicOrdering = 5 + AtomicOrdering_AcquireRelease AtomicOrdering = 6 + AtomicOrdering_SequentiallyConsistent AtomicOrdering = 7 + AtomicOrdering_LAST AtomicOrdering = 7 +) diff --git a/tool/_testcpp/llvm-22.1.8-support/system/Compiler.go b/tool/_testcpp/llvm-22.1.8-support/system/Compiler.go new file mode 100644 index 00000000..96cd087e --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/Compiler.go @@ -0,0 +1,9 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +const MEMORY_SANITIZER_BUILD = 0 +const ADDRESS_SANITIZER_BUILD = 0 +const HWADDRESS_SANITIZER_BUILD = 0 +const THREAD_SANITIZER_BUILD = 0 +const ENABLE_EXCEPTIONS = 1 diff --git a/tool/_testcpp/llvm-22.1.8-support/system/llcppg.i.go b/tool/_testcpp/llvm-22.1.8-support/system/llcppg.i.go new file mode 100644 index 00000000..bb33cc87 --- /dev/null +++ b/tool/_testcpp/llvm-22.1.8-support/system/llcppg.i.go @@ -0,0 +1,5 @@ +// Code generated by llcppg; DO NOT EDIT. + +package system + +const LLGoPackage = "link: -L$(llvm-config --libdir) -lLLVM; -lLLVM" diff --git a/tool/config.go b/tool/config.go index 3e5f42b8..623c24f9 100644 --- a/tool/config.go +++ b/tool/config.go @@ -31,6 +31,7 @@ type Config struct { Name string `json:"Name"` // required, sub package name should sarts with '/' Language string `json:"Language"` // c, c++, etc. required Dir string `json:"Dir"` // dir or dir/... (recursive), required + Files []string `json:"Files"` // selected header files, optional Stdlib string `json:"Stdlib"` // C stdlib include dir, optional LLGoPackage string `json:"LLGoPackage"` // optional CFlags string `json:"CFlags"` // optional diff --git a/tool/gen.go b/tool/gen.go index cc1d29aa..67225f99 100644 --- a/tool/gen.go +++ b/tool/gen.go @@ -21,7 +21,9 @@ import ( "go/token" "log" "os" + "path" "path/filepath" + "sort" "strings" "github.com/goplus/gogen" @@ -69,7 +71,7 @@ const includeSuffix = string(os.PathSeparator) + "include" // NewPackage loads the source files and converts them into a Go package according to the // configuration. -func (cfg *Config) NewPackage(pkgPath, workDir string, index clang.Index) (ret cl.Package, lang cl.Language, err error) { +func (cfg *Config) NewPackage(pkgPath, pkgName, workDir string, index clang.Index) (ret cl.Package, lang cl.Language, err error) { lang, ok := cfg.Lang() if !ok { err = fmt.Errorf("invalid language: %q", cfg.Language) @@ -138,9 +140,15 @@ func (cfg *Config) NewPackage(pkgPath, workDir string, index clang.Index) (ret c log.Println("==> includeDirs:", incDirs) } - topHeaders, err := pputil.TopHeaders(dir, recursive, false, incDirs) - if err != nil { - return + var topHeaders []string + var selFiles = cfg.Files + if len(selFiles) > 0 { + topHeaders = listHeaderFiles(selFiles, dir) + } else { + topHeaders, err = pputil.TopHeaders(dir, recursive, false, incDirs) + if err != nil { + return + } } files, err := ParseSources(index, topHeaders, incDirs, cfg.Language) @@ -150,7 +158,10 @@ func (cfg *Config) NewPackage(pkgPath, workDir string, index clang.Index) (ret c defer DisposeSources(files) srcFilePrefix := dir + string(os.PathSeparator) - ret, err = cl.NewPackage(pkgPath, cfg.Name, files, &cl.Config{ + if pkgName == "" { + pkgName = path.Base(cfg.Name) + } + ret, err = cl.NewPackage(pkgPath, pkgName, files, &cl.Config{ Fset: fset, Importer: imp, LLGoPackage: cfg.LLGoPackage, @@ -186,6 +197,16 @@ func (cfg *Config) NewPackage(pkgPath, workDir string, index clang.Index) (ret c return } +func listHeaderFiles(selFiles []string, headerDir string) (topHeaders []string) { + headerDir += string(os.PathSeparator) + topHeaders = make([]string, len(selFiles)) + for i, selFile := range selFiles { + topHeaders[i] = filepath.Join(headerDir, selFile) + } + sort.Strings(topHeaders) + return +} + func goFileOf(at, srcFilePrefix string) (fname string, ok bool) { const pathSep = string(os.PathSeparator) const goFileExt = ".go" @@ -324,7 +345,7 @@ func Gen(destDir, srcDir string, index clang.Index) (err error) { return } - pkg, _, err := cfg.NewPackage("", srcDir, index) + pkg, _, err := cfg.NewPackage("", "", srcDir, index) if err != nil { return } diff --git a/tool/gen_test.go b/tool/gen_test.go index a7ca9b57..66b38479 100644 --- a/tool/gen_test.go +++ b/tool/gen_test.go @@ -178,6 +178,7 @@ func testFromDir(t *testing.T, sel, relDir string, single bool, subPkg ...string if err != nil { log.Fatal("LoadConf failed:", err) } + pkgPrefix := conf.Name + "/" var pkgSel string if len(subPkg) > 0 { @@ -233,7 +234,14 @@ func testFromDir(t *testing.T, sel, relDir string, single bool, subPkg ...string return } - pkg, lang, err := conf.NewPackage("", pkgDir, idx) + pkgName := conf.Name + destDir := pkgDir + if pos := strings.LastIndex(pkgName, "/"); pos >= 0 { + destDir = filepath.Join(pkgDir, pkgName[len(pkgPrefix):]) + pkgName = pkgName[pos+1:] + os.MkdirAll(destDir, 0755) + } + pkg, lang, err := conf.NewPackage("", pkgName, pkgDir, idx) if err != nil { t.Error("conf.NewPackage:", err) return @@ -242,13 +250,13 @@ func testFromDir(t *testing.T, sel, relDir string, single bool, subPkg ...string if file.Empty() { return // skip empty Go files } - exp, _ := os.ReadFile(pkgDir + "/" + fname) - testGenGo(t, pkg.Package, pkgDir, fname, exp) + exp, _ := os.ReadFile(destDir + "/" + fname) + testGenGo(t, pkg.Package, destDir, fname, exp) }) wrapFile := "/wrap" + langExts[lang] - wrap, _ := os.ReadFile(pkgDir + wrapFile) + wrap, _ := os.ReadFile(destDir + wrapFile) if pkg.Wrap != nil { - testDiff(t, pkgDir, wrapFile+".txt", &pkg.Wrap.Content, wrap) + testDiff(t, destDir, wrapFile+".txt", &pkg.Wrap.Content, wrap) } }) } @@ -266,6 +274,10 @@ func TestSingleC(t *testing.T) { testFromDir(t, "", "./_testc", true) } +func TestCpp_LLVMSystem(t *testing.T) { + testFromDir(t, "", "./_testcpp", false, "system") +} + func TestLLVM_AMDGPUAddrSpace(t *testing.T) { testFromDir(t, "AMDGPUAddrSpace", "./_testcpp", true, "system") }