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Expand file tree Collapse file tree Original file line number Diff line number Diff line change 1- # Waveforms
2- * .vpd
1+ # Waveform formats
32* .vcd
3+ * .vpd
44* .evcd
5+ * .fsdb
56
6- # Binary files
7+ # Default name of the simulation executable. A different name can be
8+ # specified with this switch (the associated daidir database name is
9+ # also taken from here): -o <path>/<filename>
710simv
811
9- # Directories used for compilation
10- csrc /
12+ # Generated for Verilog and VHDL top configs
1113simv.daidir /
14+ simv.db.dir /
1215
13- # Log files
14- * .log
16+ # Infrastructure necessary to co-simulate SystemC models with
17+ # Verilog/VHDL models. An alternate directory may be specified with this
18+ # switch: -Mdir=<directory_path>
19+ csrc /
1520
16- # DVE, UCLI related files
17- DVEfiles /
18- ucli *
19- * .key
21+ # Log file - the following switch allows to specify the file that will be
22+ # used to write all messages from simulation: -l <filename>
23+ * .log
2024
21- # Coverage related files
25+ # Coverage results (generated with urg) and database location. The
26+ # following switch can also be used: urg -dir <coverage_directory>.vdb
2227simv.vdb /
2328urgReport /
29+
30+ # DVE and UCLI related files.
31+ DVEfiles /
32+ ucli.key
33+
34+ # When the design is elaborated for DirectC, the following file is created
35+ # with declarations for C/C++ functions.
36+ vc_hdrs.h
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