winch(aarch64): Improve addressing modes (#12708)

Prior to this commit, Winch's `Address` representation relied on the
general `(reg, offset)` form for offset-based addressing, leaving the
materialization of the addressing mode to Cranelift. This approach led
to the following bug found by the fuzzer:

When offsets cannot be encoded as a 9-bit signed immediate offset or a
12-bit unsigned immediate offset with scaling, the offset must be
loaded into a register and the addressing mode is transformed to its
`(reg, reg)` form. Cranelift's addressing mode materialization currently
uses `x16` as a scratch register to load the offset; even though
both Cranelift and Winch use `x16` as a scratch register, its usage is
not in sync, therefore clobbers can happen.

This commit improves addressing modes by requiring early
materialization of addressing modes into their respective Cranelift
variants.

Author: saulecabrera