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Fix some comparison-related clif optimization rules (#13099)
* Fix some comparison-related clif optimization rules The fix in #13063 failed to take into account some extra rules in `bitops.isle` which now works for vector types and didn't correctly use the `cmp_true` helper to create a "true" value for the destination type. * Fix test on riscv64
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cranelift/codegen/src/opts/bitops.isle

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -222,8 +222,8 @@
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(rule (simplify (bor ty (bnot ty x) (band ty x y))) (bor ty y (bnot ty x)))
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; (z & x) ^ (z & y) => z & (x ^ y)
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(rule (simplify
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(bxor ty (band ty z x) (band ty z y)))
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(rule (simplify
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(bxor ty (band ty z x) (band ty z y)))
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(band ty z (bxor ty x y)))
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; (x & y) | ~(x ^ y) => ~(x ^ y)
@@ -669,13 +669,13 @@
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(rule (simplify (eq rty (bnot cty y) (band cty x (bnot cty y)))) (eq rty (bor cty y x) (iconst_s cty -1)))
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;; x >=_u (x & y), and (x & y) <=_u x, are always true.
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(rule (simplify (uge ty x (band ty x y))) (iconst_u ty 1))
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(rule (simplify (uge ty x (band ty y x))) (iconst_u ty 1))
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(rule (simplify (ule ty (band ty x y) x)) (iconst_u ty 1))
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(rule (simplify (ule ty (band ty y x) x)) (iconst_u ty 1))
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(rule (simplify (uge ty x (band ty x y))) (cmp_true ty))
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(rule (simplify (uge ty x (band ty y x))) (cmp_true ty))
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(rule (simplify (ule ty (band ty x y) x)) (cmp_true ty))
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(rule (simplify (ule ty (band ty y x) x)) (cmp_true ty))
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;; (x | y) >=_u x, and x <=_u (x | y), are always true.
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(rule (simplify (uge ty (bor ty x y) x)) (iconst_u ty 1))
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(rule (simplify (uge ty (bor ty y x) x)) (iconst_u ty 1))
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(rule (simplify (ule ty x (bor ty x y))) (iconst_u ty 1))
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(rule (simplify (ule ty x (bor ty y x))) (iconst_u ty 1))
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(rule (simplify (uge ty (bor ty x y) x)) (cmp_true ty))
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(rule (simplify (uge ty (bor ty y x) x)) (cmp_true ty))
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(rule (simplify (ule ty x (bor ty x y))) (cmp_true ty))
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(rule (simplify (ule ty x (bor ty y x))) (cmp_true ty))
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test interpret
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test run
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set opt_level=speed
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set enable_multi_ret_implicit_sret
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target aarch64
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target s390x
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target x86_64
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target x86_64 skylake
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target riscv64 has_v
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target riscv64 has_v has_c has_zcb
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target pulley32
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target pulley32be
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target pulley64
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target pulley64be
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function %uge_band_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = band v0, v1
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v3 = icmp uge v0, v2
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return v3
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}
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; run: %uge_band_i32x4([1 2 3 4], [5 6 7 8]) == [-1 -1 -1 -1]
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; run: %uge_band_i32x4([0 0 0 0], [0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF 0xFFFFFFFF]) == [-1 -1 -1 -1]
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function %uge_band_commuted_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = band v1, v0
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v3 = icmp uge v0, v2
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return v3
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}
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; run: %uge_band_commuted_i32x4([1 2 3 4], [5 6 7 8]) == [-1 -1 -1 -1]
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function %ule_band_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = band v0, v1
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v3 = icmp ule v2, v0
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return v3
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}
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; run: %ule_band_i32x4([1 2 3 4], [5 6 7 8]) == [-1 -1 -1 -1]
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function %ule_bor_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = bor v0, v1
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v3 = icmp ule v0, v2
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return v3
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}
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; run: %ule_bor_i32x4([1 2 3 4], [5 6 7 8]) == [-1 -1 -1 -1]
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function %uge_bor_i32x4(i32x4, i32x4) -> i32x4 {
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block0(v0: i32x4, v1: i32x4):
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v2 = bor v0, v1
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v3 = icmp uge v2, v0
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return v3
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}
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; run: %uge_bor_i32x4([1 2 3 4], [5 6 7 8]) == [-1 -1 -1 -1]
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function %uge_band_i16x8(i16x8, i16x8) -> i16x8 {
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block0(v0: i16x8, v1: i16x8):
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v2 = band v0, v1
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v3 = icmp uge v0, v2
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return v3
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}
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; run: %uge_band_i16x8([1 2 3 4 5 6 7 8], [9 10 11 12 13 14 15 16]) == [-1 -1 -1 -1 -1 -1 -1 -1]
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function %uge_band_i8x16(i8x16, i8x16) -> i8x16 {
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block0(v0: i8x16, v1: i8x16):
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v2 = band v0, v1
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v3 = icmp uge v0, v2
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return v3
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}
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; run: %uge_band_i8x16([1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16], [17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32]) == [-1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1]
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function %uge_band_i64x2(i64x2, i64x2) -> i64x2 {
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block0(v0: i64x2, v1: i64x2):
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v2 = band v0, v1
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v3 = icmp uge v0, v2
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return v3
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}
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; run: %uge_band_i64x2([1 2], [3 4]) == [-1 -1]

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