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saulecabrerasaulecabrera
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Ensure register allocation ordering for i8x16 popcnt (#12010)
Closes bytecodealliance/wasmtime#11991 This commit fixes the register allocation ordering for `i8x16.popcnt`. This change avoids having to deal wiht a potential spill when holding the scratch register scope by allocating the floating point register prior to the acquiring the scratch register.
1 parent 7d41355 commit cd985e0

2 files changed

Lines changed: 119 additions & 1 deletion

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‎tests/disas/winch/x64/i8x16_popcnt/multiple.wat‎

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,118 @@
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;;! target = "x86_64"
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;;! test = "winch"
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;;! flags = [ "-Ccranelift-has-avx" ]
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(module
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(type (;0;) (func (param v128 i64)))
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(table (;0;) 0 265945 funcref)
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(global (;0;) (mut f32) f32.const -0x1.4f4f4ep-48 (;=-0.000000000000004653358;))
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(global (;1;) (mut f32) f32.const -0x1.cbcb4ep+76 (;=-135707280000000000000000;))
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(global (;2;) (mut v128) v128.const i32x4 0xff500177 0x01bbffff 0x5e010150 0x3b3b0177)
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(func (;0;) (type 0) (param v128 i64)
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local.get 0
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local.get 1
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global.get 1
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global.get 0
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global.get 1
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global.get 1
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global.get 1
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global.get 1
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global.get 0
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global.get 1
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global.get 1
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global.get 0
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global.get 1
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global.get 1
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local.get 0
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i8x16.popcnt
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global.get 0
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global.get 2
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i8x16.popcnt
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unreachable
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)
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)
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;; wasm[0]::function[0]:
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;; pushq %rbp
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;; movq %rsp, %rbp
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;; movq 8(%rdi), %r11
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;; movq 0x10(%r11), %r11
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;; addq $0x8c, %r11
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;; cmpq %rsp, %r11
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;; ja 0x1c5
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;; 1c: movq %rdi, %r14
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;; subq $0x30, %rsp
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;; movq %rdi, 0x28(%rsp)
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;; movq %rsi, 0x20(%rsp)
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;; movdqu %xmm0, 0x10(%rsp)
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;; movq %rdx, 8(%rsp)
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;; movss 0x50(%r14), %xmm0
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;; movss 0x40(%r14), %xmm1
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;; movss 0x50(%r14), %xmm2
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;; movss 0x50(%r14), %xmm3
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;; movss 0x50(%r14), %xmm4
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;; movss 0x50(%r14), %xmm5
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;; movss 0x40(%r14), %xmm6
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;; movss 0x50(%r14), %xmm7
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;; movss 0x50(%r14), %xmm8
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;; movss 0x40(%r14), %xmm9
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;; movss 0x50(%r14), %xmm10
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;; movss 0x50(%r14), %xmm11
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;; movdqu 0x10(%rsp), %xmm12
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;; vpand 0x13e(%rip), %xmm12, %xmm15
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;; vpsrlw $4, %xmm12, %xmm12
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;; vpand 0x130(%rip), %xmm12, %xmm12
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;; movdqu 0x137(%rip), %xmm13
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;; vpshufb %xmm12, %xmm13, %xmm12
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;; vpshufb %xmm15, %xmm13, %xmm15
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;; vpaddb %xmm15, %xmm12, %xmm12
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;; movss 0x40(%r14), %xmm13
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;; movdqu 0x60(%r14), %xmm14
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;; movdqu 0x10(%rsp), %xmm15
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;; subq $0x10, %rsp
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;; movdqu %xmm15, (%rsp)
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;; movq 0x18(%rsp), %r11
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;; pushq %r11
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;; subq $4, %rsp
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;; movss %xmm0, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm1, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm2, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm3, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm4, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm5, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm6, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm7, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm8, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm9, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm10, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm11, (%rsp)
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;; subq $0x10, %rsp
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;; movdqu %xmm12, (%rsp)
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;; subq $4, %rsp
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;; movss %xmm13, (%rsp)
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;; vpand 0x3b(%rip), %xmm14, %xmm15
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;; vpsrlw $4, %xmm14, %xmm14
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;; vpand 0x2d(%rip), %xmm14, %xmm14
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;; movdqu 0x35(%rip), %xmm0
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;; vpshufb %xmm14, %xmm0, %xmm14
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;; vpshufb %xmm15, %xmm0, %xmm15
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;; vpaddb %xmm15, %xmm14, %xmm14
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;; ud2
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;; addq $0x30, %rsp
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;; popq %rbp
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;; retq
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;; 1c5: ud2
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;; 1c7: addb %al, (%rax)
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;; 1c9: addb %al, (%rax)
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;; 1cb: addb %al, (%rax)
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;; 1cd: addb %al, (%rax)
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;; 1cf: addb %cl, (%rdi)

‎winch/codegen/src/isa/x64/masm.rs‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3059,6 +3059,7 @@ impl Masm for MacroAssembler {
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self.ensure_has_avx()?;
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let reg = writable!(context.pop_to_reg(self, None)?.reg);
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let reg2 = writable!(context.any_fpr(self)?);
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// This works by using a lookup table to determine the count of bits
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// set in the upper 4 bits and lower 4 bits separately and then adding
@@ -3103,7 +3104,6 @@ impl Masm for MacroAssembler {
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let address = masm.asm.add_constant(&[
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0x0, 0x1, 0x1, 0x2, 0x1, 0x2, 0x2, 0x3, 0x1, 0x2, 0x2, 0x3, 0x2, 0x3, 0x3, 0x4,
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]);
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let reg2 = writable!(context.any_fpr(masm)?);
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masm.asm
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.xmm_mov_mr(&address, reg2, OperandSize::S128, MemFlags::trusted());
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// Use the upper 4 bits as an index into the lookup table.

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