diff --git a/3rdparty/QoLA b/3rdparty/QoLA
index 0d6665b6d..bbcf79e61 160000
--- a/3rdparty/QoLA
+++ b/3rdparty/QoLA
@@ -1 +1 @@
-Subproject commit 0d6665b6d87feeafe4b782dcc736c5e755dc5b34
+Subproject commit bbcf79e610c69b4d84615c0bb51abfee7bad1a8d
diff --git a/3rdparty/ck_jit b/3rdparty/ck_jit
index 617a89b7a..929462cde 160000
--- a/3rdparty/ck_jit
+++ b/3rdparty/ck_jit
@@ -1 +1 @@
-Subproject commit 617a89b7ae9111fea92f13eeccc9e50a6ee8d01f
+Subproject commit 929462cde3dce0109d7b3f2252e4371742360c02
diff --git a/ci/ck_jit_prebuild.txt b/ci/ck_jit_prebuild.txt
index e92365e02..5c06af1cb 100644
--- a/ci/ck_jit_prebuild.txt
+++ b/ci/ck_jit_prebuild.txt
@@ -1,541 +1,601 @@
-fmha_bwd_convert_dq_d128_bf16_b64x0_batch_o2_npad_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d128_bf16_b64x0_batch_o2_npad_ndeterministic_gfx9.so
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-fmha_bwd_convert_dq_d128_bf16_b64x0_group_o2_ps_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d128_bf16_b64x0_group_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d128_bf16_b64x128_batch_o2_npad_deterministic_gfx950.so
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-fmha_bwd_convert_dq_d128_bf16_b64x128_group_o2_ps_deterministic_gfx9.so
-fmha_bwd_convert_dq_d128_bf16_b64x192_batch_o2_npad_deterministic_gfx950.so
-fmha_bwd_convert_dq_d128_bf16_b64x192_batch_o2_pd_deterministic_gfx950.so
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-fmha_bwd_convert_dq_d128_fp16_b64x0_batch_o2_npad_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d128_fp16_b64x0_batch_o2_npad_ndeterministic_gfx9.so
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-fmha_bwd_convert_dq_d128_fp16_b64x0_batch_o2_pd_ndeterministic_gfx9.so
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-fmha_bwd_convert_dq_d128_fp16_b64x128_batch_o2_npad_deterministic_gfx950.so
-fmha_bwd_convert_dq_d128_fp16_b64x128_batch_o2_npad_deterministic_gfx9.so
-fmha_bwd_convert_dq_d128_fp16_b64x128_group_o2_ps_deterministic_gfx950.so
-fmha_bwd_convert_dq_d128_fp16_b64x128_group_o2_ps_deterministic_gfx9.so
-fmha_bwd_convert_dq_d128_fp16_b64x192_batch_o2_npad_deterministic_gfx950.so
-fmha_bwd_convert_dq_d128_fp16_b64x192_group_o2_ps_deterministic_gfx950.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_npad_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_npad_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_pd_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_pd_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_psd_ndeterministic_gfx950.so
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-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_ps_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_batch_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_group_o2_ps_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_bf16_b64x0_group_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_pd_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_pd_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_psd_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_psd_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_ps_ndeterministic_gfx950.so
-fmha_bwd_convert_dq_d256_fp16_b64x0_batch_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_bf16_b64x0_batch_o2_npad_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_bf16_b64x0_batch_o2_pd_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_bf16_b64x0_batch_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_fp16_b64x0_batch_o2_npad_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_fp16_b64x0_batch_o2_pd_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d32_fp16_b64x0_batch_o2_ps_ndeterministic_gfx9.so
-fmha_bwd_convert_dq_d64_bf16_b64x0_batch_o2_npad_ndeterministic_gfx950.so
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-fmha_bwd_convert_dq_d64_bf16_b64x0_batch_o2_pd_ndeterministic_gfx950.so
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-fmha_bwd_convert_dq_d64_bf16_b64x128_batch_o2_npad_deterministic_gfx950.so
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-fmha_bwd_d128_bf16_batch_b16x16x128x16x128x16x16x128x128_r1x1x1_r1x1x1_r1x1x1_w16x16x32_w16x16x16_o2_maxq16_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950.so
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+fmha_bwd_d128_bf16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_mask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_nmask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_bf16_group_b16x16x128x16x128x16x16x128x128_r1x1x1_r1x1x1_r1x1x1_w16x16x32_w16x16x16_o2_maxq16_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_bf16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_dbias_mask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_dbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_dbias_nmask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_dbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_ndbias_mask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_ndbias_nmask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_bias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_mask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_nmask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_batch_b16x16x128x16x128x16x16x128x128_r1x1x1_r1x1x1_r1x1x1_w16x16x32_w16x16x16_o2_maxq16_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x16x128x16x128x16x16x128x128_r1x1x1_r1x1x1_r1x1x1_w16x16x32_w16x16x16_o2_maxq16_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_dbias_mask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_dbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_dbias_nmask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_dbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_ndbias_mask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_ndbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_ndbias_nmask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_bias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_mask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_batch_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_mask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_nmask_dropout_wg16_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x128x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pdv8_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_mask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_mask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_dropout_wg16_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b16x192x128x16x128x16x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_mask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_deterministic_trload_gfx950
+fmha_bwd_d128_fp16_group_b32x128x128x32x128x32x32x128x128_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x32_o1_maxq0_pd8dv8_nbias_ndbias_nmask_ndropout_ndeterministic_trload_gfx950
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_bias_dbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_bias_dbias_mask_ndropout_ndeterministic_ntrload_gfx950
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_mask_ndropout_ndeterministic_ntrload_gfx950
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx9
+fmha_bwd_d256_bf16_batch_b16x64x256x16x256x16x32x256x256_r1x4x1_r4x1x1_r1x4x1_w16x16x32_w16x16x16_o1_maxq0_npad_nbias_ndbias_nmask_ndropout_ndeterministic_ntrload_gfx950
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+fmha_fwd_d32_bf16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_bf16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_bf16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_bf16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_bf16_group_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d32_fp16_batch_b128x64x16x32x32x32_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_alibi_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_alibi_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_psskddv_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_bf16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_alibi_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_alibi_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_batch_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_vr_npad_nlogits_bias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_mask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_dropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d64_fp16_group_b128x64x32x64x32x64_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psskddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d96_bf16_batch_b128x128x32x128x32x96_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d96_bf16_batch_b128x128x32x128x32x96_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
+fmha_fwd_d96_fp16_batch_b128x128x32x128x32x96_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx9
+fmha_fwd_d96_fp16_batch_b128x128x32x128x32x96_r4x1x1_r4x1x1_w32x32x16_w32x32x16_qr_async_vr_psddv_nlogits_nbias_nmask_lse_ndropout_nskip_nqscale_ntrload_nsink_gfx950
diff --git a/transformer_engine/common/ck_fused_attn/CMakeLists.txt b/transformer_engine/common/ck_fused_attn/CMakeLists.txt
index a9ba4028b..96b3e7b2f 100644
--- a/transformer_engine/common/ck_fused_attn/CMakeLists.txt
+++ b/transformer_engine/common/ck_fused_attn/CMakeLists.txt
@@ -65,48 +65,45 @@ if("${AITER_SHA}" STREQUAL "")
   message(FATAL_ERROR
           "Failed to parse 'aiter_commit = \"...\"' line in ${__QOLA_MANIFEST}.")
 endif()
-
-if(Python_EXECUTABLE)
-  if (NOT __SKIP_AITER_CHECKOUT)
-    execute_process(
-      COMMAND sh -c
-        "PYTHONPATH=\"${__QOLA_DIR}:$PYTHONPATH\" '${Python_EXECUTABLE}' -m qola.cli checkout \
-        --manifest '${__QOLA_MANIFEST}' \
-        --aiter-root '${__AITER_SOURCE_DIR}'"
-      RESULT_VARIABLE AITER_CHECKOUT_RESULT
-      OUTPUT_VARIABLE AITER_CHECKOUT_OUTPUT
-      ERROR_VARIABLE AITER_CHECKOUT_ERROR
-      OUTPUT_STRIP_TRAILING_WHITESPACE
-      ERROR_STRIP_TRAILING_WHITESPACE
-    )
-    if(NOT AITER_CHECKOUT_RESULT EQUAL 0)
-      message(FATAL_ERROR
-              "Failed to sync AITER source tree at ${__AITER_SOURCE_DIR} to "
-              "manifest-pinned commit ${AITER_SHA}.\n"
-              "${AITER_CHECKOUT_OUTPUT}\n${AITER_CHECKOUT_ERROR}")
-    endif()
-    message(STATUS "[AITER] Synced ${__AITER_SOURCE_DIR} to ${AITER_SHA}")
-  endif()
-
+if (NOT __SKIP_AITER_CHECKOUT)
   execute_process(
-    COMMAND ${Python_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/check_aiter_mha_args.py
-            --mode both
-            --te-dir "${CMAKE_CURRENT_LIST_DIR}/../../.."
-            --aiter-root "${__AITER_SOURCE_DIR}"
-    RESULT_VARIABLE AITER_ARG_CHECK_RESULT
-    OUTPUT_VARIABLE AITER_ARG_CHECK_OUTPUT
-    ERROR_VARIABLE AITER_ARG_CHECK_ERROR
+    COMMAND sh -c
+      "PYTHONPATH=\"${__QOLA_DIR}:$PYTHONPATH\" '${Python_EXECUTABLE}' -m qola.cli checkout \
+--manifest '${__QOLA_MANIFEST}' \
+--aiter-root '${__AITER_SOURCE_DIR}'"
+    RESULT_VARIABLE AITER_CHECKOUT_RESULT
+    OUTPUT_VARIABLE AITER_CHECKOUT_OUTPUT
+    ERROR_VARIABLE AITER_CHECKOUT_ERROR
     OUTPUT_STRIP_TRAILING_WHITESPACE
     ERROR_STRIP_TRAILING_WHITESPACE
   )
-
-  if(NOT AITER_ARG_CHECK_RESULT EQUAL 0)
+  if(NOT AITER_CHECKOUT_RESULT EQUAL 0)
     message(FATAL_ERROR
-            "AITER API validation failed in check_aiter_mha_args.py.\n"
-            "${AITER_ARG_CHECK_OUTPUT}\n${AITER_ARG_CHECK_ERROR}")
+            "Failed to sync AITER source tree at ${__AITER_SOURCE_DIR} to "
+            "manifest-pinned commit ${AITER_SHA}.\n"
+            "${AITER_CHECKOUT_OUTPUT}\n${AITER_CHECKOUT_ERROR}")
   endif()
-  message(STATUS "AITER API validation passed via check_aiter_mha_args.py")
+  message(STATUS "[AITER] Synced ${__AITER_SOURCE_DIR} to ${AITER_SHA}")
+endif()
+
+execute_process(
+  COMMAND ${Python_EXECUTABLE} ${CMAKE_CURRENT_LIST_DIR}/check_aiter_mha_args.py
+          --mode both
+          --te-dir "${CMAKE_CURRENT_LIST_DIR}/../../.."
+          --aiter-root "${__AITER_SOURCE_DIR}"
+  RESULT_VARIABLE AITER_ARG_CHECK_RESULT
+  OUTPUT_VARIABLE AITER_ARG_CHECK_OUTPUT
+  ERROR_VARIABLE AITER_ARG_CHECK_ERROR
+  OUTPUT_STRIP_TRAILING_WHITESPACE
+  ERROR_STRIP_TRAILING_WHITESPACE
+)
+
+if(NOT AITER_ARG_CHECK_RESULT EQUAL 0)
+  message(FATAL_ERROR
+          "AITER API validation failed in check_aiter_mha_args.py.\n"
+          "${AITER_ARG_CHECK_OUTPUT}\n${AITER_ARG_CHECK_ERROR}")
 endif()
+message(STATUS "AITER API validation passed via check_aiter_mha_args.py")
 
 # Sanity-check the resolved include directories now that `qola checkout` has
 # materialized the AITER tree.
@@ -224,7 +221,8 @@ endforeach()
 add_library(ck_fused_attn SHARED ${ck_fused_attn_SOURCES})
 set(CK_FUSED_ATTN_COMPILE_OPTIONS)
 list(APPEND CK_FUSED_ATTN_COMPILE_OPTIONS
-    -DCK_TILE_FLOAT_TO_BFLOAT16_DEFAULT=${CK_FUSED_ATTN_FLOAT_TO_BFLOAT16_DEFAULT})
+    -DCK_TILE_FLOAT_TO_BFLOAT16_DEFAULT=${CK_FUSED_ATTN_FLOAT_TO_BFLOAT16_DEFAULT}
+    -DENABLE_CK=1)
 
 # Public QoLA headers ship alongside the .so libs in ${__AITER_MHA_PATH}/../include
 # (emitted by qola.cli build, or copied from the QoLA build dir above for the
diff --git a/transformer_engine/common/ck_fused_attn/include/ck_fused_attn/ck_fused_attn.hpp b/transformer_engine/common/ck_fused_attn/include/ck_fused_attn/ck_fused_attn.hpp
index 150c8bfb3..30d1c1251 100644
--- a/transformer_engine/common/ck_fused_attn/include/ck_fused_attn/ck_fused_attn.hpp
+++ b/transformer_engine/common/ck_fused_attn/include/ck_fused_attn/ck_fused_attn.hpp
@@ -113,7 +113,6 @@ struct CkAttnBwdArgs : CKAttnCommonArgs {
   // dQ
   void* dq_ptr = nullptr;
   uint64_t stride_b_dq = 0, stride_h_dq = 0, stride_s_dq = 0;
-  void* dq_acc_ptr = nullptr;
 
   // dK / dV expanded (MQA/GQA reduction inputs; null when h==hg)
   void* dk_expanded_ptr = nullptr;
@@ -134,6 +133,13 @@ struct CkAttnBwdArgs : CKAttnCommonArgs {
   // Workspace shared with forward LSE
   void* lse_workspace_ptr = nullptr;
 
+  // AOT scratch for AITER's internal bwd allocations (launcher metadata + dq_acc
+  // accumulator). Carved from the caller's workspace and handed to aiter through
+  // the workspace_alloc callback; ck_attn_bwd_workspace_size() reports the bytes
+  // to reserve. aiter_workspace_bytes bounds the bump allocator.
+  void* aiter_workspace_ptr = nullptr;
+  size_t aiter_workspace_bytes = 0;
+
   // V3 ASM kernel selection
   bool deterministic = false;
   bool uses_bwd_v3 = false;
@@ -143,6 +149,10 @@ struct CkAttnBwdArgs : CKAttnCommonArgs {
 hipError_t ck_attn_fwd(const CKAttnFwdArgs& args, hipStream_t stream);
 hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream);
 
+// Bytes of AOT device scratch ck_attn_bwd needs for AITER's internal bwd
+// workspace (launcher metadata + dq_acc), covering both the v2 (CK launcher) and
+// v3 (asm) dispatch paths. Pure host-side computation; no kernel launch.
+size_t ck_attn_bwd_workspace_size(const CkAttnBwdArgs& args);
 // Probe whether AITER's v3 (asm) path will run for the given config, without
 // launching a kernel (backed by AITER's v3_api_check dry-run). Returns true iff
 // the v3 path is selected; false means the CK v2 path (or no support) would run.
diff --git a/transformer_engine/common/ck_fused_attn/qola_manifest.toml b/transformer_engine/common/ck_fused_attn/qola_manifest.toml
index bba5ccc22..237f03ad4 100644
--- a/transformer_engine/common/ck_fused_attn/qola_manifest.toml
+++ b/transformer_engine/common/ck_fused_attn/qola_manifest.toml
@@ -1,5 +1,5 @@
 [qola]
-aiter_commit = "d32b0cb62ecc32bb1a858e8437d58eb9b3856af6"    # pinned AITER submodule commit
+aiter_commit = "e95f7d4e3924e848c1daf4df449e27822b332a09"    # pinned AITER submodule commit
 namespace = "te"
 rocm_versions = ["7.2"]
 
@@ -9,9 +9,11 @@ architectures = ["gfx950", "gfx942"]
 [[modules]]
 name = "libmha_fwd"
 mode = "cpp_itfs"
+receipt = 700
 drop_srcs = ["mha_fwd_split.cu", "mha_fwd_batch_prefill.cu"]
 drop_directions = ["fwd_splitkv", "batch_prefill"]
 
 [[modules]]
 name = "libmha_bwd"
 mode = "cpp_itfs"
+receipt = 700
diff --git a/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_bwd.cpp b/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_bwd.cpp
index a7425be98..087a914ab 100644
--- a/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_bwd.cpp
+++ b/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_bwd.cpp
@@ -5,9 +5,13 @@
  ************************************************************************/
 
 #include <iostream>
+#include <cstddef>
+#include <cstdint>
 #include <cstdlib>
+#include <memory>
 #include <stdexcept>
 #include <type_traits>
+#include <hip/hip_runtime.h>
 #include "ck_fused_attn/ck_fused_attn.hpp"
 #include "qola_mha_bwd.h"
 #include "ck_fused_attn_utils.hpp"
@@ -331,9 +335,8 @@ __global__ void dbias_reduce_b1ss(
 }
 
 // print the fmha_traits and args passed into ck apis
-void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args){
+void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args, std::ostream* log_file){
 
-  std::ostream* log_file = get_ck_log_stream();
   (*log_file) << "\n" << func_name << "\n";
 
   // fmha_traits debug
@@ -365,7 +368,6 @@ void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args)
   log_value(log_file, "dk_ptr", fmha_args.dk_ptr);
   log_value(log_file, "dv_ptr", fmha_args.dv_ptr);
   log_value(log_file, "dbias_ptr", fmha_args.dbias_ptr);
-  log_value(log_file, "dq_acc_ptr", fmha_args.dq_acc_ptr);
 
   log_value(log_file, "seqstart_q_ptr", fmha_args.seqstart_q_ptr);
   log_value(log_file, "seqstart_k_ptr", fmha_args.seqstart_k_ptr);
@@ -390,7 +392,6 @@ void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args)
   log_value(log_file, "stride_o", fmha_args.stride_o);
   log_value(log_file, "stride_randval", fmha_args.stride_randval);
   log_value(log_file, "stride_do", fmha_args.stride_do);
-  log_value(log_file, "stride_dq_acc", fmha_args.stride_dq_acc);
   log_value(log_file, "stride_dq", fmha_args.stride_dq);
   log_value(log_file, "stride_dk", fmha_args.stride_dk);
   log_value(log_file, "stride_dv", fmha_args.stride_dv);
@@ -403,7 +404,6 @@ void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args)
   log_value(log_file, "nhead_stride_randval", fmha_args.nhead_stride_randval);
   log_value(log_file, "nhead_stride_do", fmha_args.nhead_stride_do);
   log_value(log_file, "nhead_stride_lsed", fmha_args.nhead_stride_lsed);
-  log_value(log_file, "nhead_stride_dq_acc", fmha_args.nhead_stride_dq_acc);
   log_value(log_file, "nhead_stride_dq", fmha_args.nhead_stride_dq);
   log_value(log_file, "nhead_stride_dk", fmha_args.nhead_stride_dk);
   log_value(log_file, "nhead_stride_dv", fmha_args.nhead_stride_dv);
@@ -416,7 +416,6 @@ void log_bwd_config(const char* func_name, const aiter::mha_bwd_args& fmha_args)
   log_value(log_file, "batch_stride_randval", fmha_args.batch_stride_randval);
   log_value(log_file, "batch_stride_do", fmha_args.batch_stride_do);
   log_value(log_file, "batch_stride_lsed", fmha_args.batch_stride_lsed);
-  log_value(log_file, "batch_stride_dq_acc", fmha_args.batch_stride_dq_acc);
   log_value(log_file, "batch_stride_dq", fmha_args.batch_stride_dq);
   log_value(log_file, "batch_stride_dk", fmha_args.batch_stride_dk);
   log_value(log_file, "batch_stride_dv", fmha_args.batch_stride_dv);
@@ -441,6 +440,70 @@ void dump_bwd_timings(const char* dump_path, float average_runtime){
   file << average_runtime << "\n";
 }
 
+namespace {
+
+// Trait subset that determines AITER's internal bwd workspace footprint. Mirrors
+// the fields ck_attn_bwd sets on mha_bwd_args so the size query and the dispatch
+// stay in lockstep.
+::fmha_bwd_traits make_bwd_traits(const CkAttnBwdArgs& args){
+  bool has_dropout = (args.dropout_probability > 0.f);
+  bool has_dbias = args.dbias_ptr != nullptr;
+  bias_enum bias_type = bias_enum::no_bias;
+  if(!args.is_group_mode()){
+    bias_type = get_ck_bias_type_shape(&args).first;
+  }
+  return ::fmha_bwd_traits{
+    /* seqlen_q         */ static_cast<int>(args.is_group_mode() ? args.max_tokens_q : args.s_q),
+    /* seqlen_k         */ static_cast<int>(args.is_group_mode() ? args.max_tokens_kv : args.s_kv),
+    /* batch            */ static_cast<int>(args.b),
+    /* max_seqlen_q     */ static_cast<int>(args.s_q),
+    /* max_seqlen_k     */ static_cast<int>(args.s_kv),
+    /* hdim_q           */ static_cast<int>(args.d_qk),
+    /* hdim_v           */ static_cast<int>(args.d_v),
+    /* nhead_q          */ static_cast<int>(args.h),
+    /* nhead_k          */ static_cast<int>(args.hg),
+    /* data_type        */ get_data_type_str(args.dtype),
+    /* is_group_mode    */ args.is_group_mode(),
+    /* mask_type        */ static_cast<mask_enum>(args.attn_mask_type),
+    /* bias_type        */ bias_type,
+    /* has_dbias        */ (!args.is_group_mode()) && has_dbias,
+    /* has_dropout      */ has_dropout,
+    /* is_store_randval */ false,
+    /* is_deterministic */ args.deterministic,
+  };
+}
+
+// dq_acc bytes the v3 asm path allocates via workspace_alloc. Mirrors aiter's
+// fmha_v3_bwd sizing (csrc/cpp_itfs/mha_bwd.cu); returns 0 when v3 can't run so
+// the CK launcher size dominates. Gating mirrors ck_attn_bwd's use_asm_v3.
+size_t v3_dq_acc_bytes(const CkAttnBwdArgs& args){
+  const bool use_asm_v3 = (args.s_q < 16) ? false : args.uses_bwd_v3;
+  if(!use_asm_v3){
+    return 0;
+  }
+  const size_t seqlen_q = args.is_group_mode() ? args.max_tokens_q : args.s_q;
+  const size_t elem = args.is_v3_atomic_fp32 ? 4 : 2;
+  const size_t a16_seq = (args.s_q + 15) / 16 * 16;
+  const size_t a16_hdim = (args.d_qk == 192) ? 192 : 128;
+  const size_t dq_acc_seq = args.is_v3_atomic_fp32 ? seqlen_q : a16_seq;
+  const size_t dq_acc_hdim = args.is_v3_atomic_fp32 ? args.d_qk : a16_hdim;
+  // Sizing is based off of aiter/csrc/cpp_itfs/mha_bwd.cu
+  const size_t eff_batch = (args.is_group_mode() && args.is_v3_atomic_fp32) ? 1 : args.b;
+  return eff_batch * args.h * dq_acc_seq * dq_acc_hdim * elem;
+}
+
+}  // namespace
+
+size_t ck_attn_bwd_workspace_size(const CkAttnBwdArgs& args){
+  // v2 (CK launcher) reports its full device workspace (host metadata + dq_acc)
+  // host-side; v3 (asm) allocates only dq_acc. v3 is tried first but may fall
+  // back to v2, so reserve the larger of the two. The launcher symbol is forced
+  // local by QoLA's export script, so the v2 size is queried through QoLA.
+  const size_t v2_bytes = QOLA_NS(mha_bwd_workspace_size)(make_bwd_traits(args));
+  const size_t v3_bytes = v3_dq_acc_bytes(args);
+  return std::max(v2_bytes, v3_bytes);
+}
+
 struct BwdFmhaArgs {
   aiter::mha_bwd_args fmha_args;
   bool is_mqa_gqa;
@@ -466,8 +529,11 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   }
 
   aiter::mha_bwd_args fmha_args{};
+  fmha_args.sink_ptr = nullptr;
+  fmha_args.d_sink_ptr = nullptr;
   fmha_args.mask_type = static_cast<int>(static_cast<mask_enum>(args.attn_mask_type));
-  fmha_args.use_asm_v3 = args.uses_bwd_v3;
+  // Mirrors AITER's small-seqlen guard at aiter/ops/mha.py:1689.
+  fmha_args.use_asm_v3 = (args.s_q < 16) ? false : args.uses_bwd_v3;
   fmha_args.v3_atomic_fp32 = args.is_v3_atomic_fp32;
   fmha_args.v3_bf16_cvt = args.how_v3_bf16_cvt;
   fmha_args.v3_api_check = false;
@@ -498,7 +564,6 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   fmha_args.dbias_ptr = ((!args.is_group_mode()) && has_dbias)
                           ? (bias_shape==BiasShape::kBHSS ? args.dbias_ptr : args.dbias_expanded_ptr)
                           : nullptr;
-  fmha_args.dq_acc_ptr = args.dq_acc_ptr;
 
   if (args.is_group_mode()) {
     fmha_args.seqstart_q_ptr = args.cu_seqlen_q_padded_ptr==nullptr? args.cu_seqlen_q_ptr : args.cu_seqlen_q_padded_ptr;
@@ -514,8 +579,14 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   fmha_args.seqlen_q_ptr = nullptr;
   fmha_args.seqlen_k_ptr = nullptr;
 
-  fmha_args.seqlen_q = args.s_q;
-  fmha_args.seqlen_k = args.s_kv;
+  // Group mode contract (matches aiter asm_mha_varlen_bwd.cu and the v2 launcher's
+  // total_seqlen_q_padded == seqstart_q[batch] assumption in fmha_bwd.hpp): seqlen_q/k
+  // carry the padded total token counts, max_seqlen_q/k the per-sequence maximum.
+  // aiter sizes dq_acc and the device workspace upper bound from seqlen_q; passing the
+  // per-sequence length in group mode under-sizes them so the dq_acc overflow region is
+  // left unzeroed (and can be written past the end) -> corrupt/NaN dq.
+  fmha_args.seqlen_q = args.is_group_mode() ? args.max_tokens_q : args.s_q;
+  fmha_args.seqlen_k = args.is_group_mode() ? args.max_tokens_kv : args.s_kv;
   fmha_args.batch = args.b;
   fmha_args.max_seqlen_q = args.s_q;
   fmha_args.max_seqlen_k = args.s_kv;
@@ -532,8 +603,6 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   fmha_args.stride_o = args.stride_s_o;
   fmha_args.stride_randval = args.s_kv;
   fmha_args.stride_do = args.stride_s_do;
-  //dq_acc of shape (nsplits, B, H, S, D)
-  fmha_args.stride_dq_acc = args.d_qk;
   fmha_args.stride_dq = args.stride_s_dq;
   fmha_args.stride_dk = is_mqa_gqa? args.stride_s_dk_expanded : args.stride_s_dk;
   fmha_args.stride_dv = is_mqa_gqa? args.stride_s_dv_expanded : args.stride_s_dv;
@@ -551,7 +620,6 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   fmha_args.nhead_stride_randval = args.is_group_mode() ? 0 : args.s_q * args.s_kv;
   fmha_args.nhead_stride_do = args.stride_h_do;
   fmha_args.nhead_stride_lsed = args.is_group_mode() ? args.max_tokens_q : args.s_q;
-  fmha_args.nhead_stride_dq_acc = static_cast<int64_t>((args.is_group_mode() ? args.max_tokens_q : args.s_q) * args.d_qk);
   fmha_args.nhead_stride_dq = args.stride_h_dq;
   fmha_args.nhead_stride_dk = is_mqa_gqa? args.stride_h_dk_expanded : args.stride_h_dk;
   fmha_args.nhead_stride_dv = is_mqa_gqa? args.stride_h_dv_expanded : args.stride_h_dv;
@@ -567,13 +635,11 @@ BwdFmhaArgs build_bwd_fmha_args(const CkAttnBwdArgs& args){
   fmha_args.batch_stride_randval = args.is_group_mode() ? 0 : args.h * args.s_q * args.s_kv;
   fmha_args.batch_stride_do = args.is_group_mode() ? 0 : args.stride_b_do;
   fmha_args.batch_stride_lsed = args.is_group_mode() ? 0 : args.h * args.s_q;
-  fmha_args.batch_stride_dq_acc = args.is_group_mode() ? 0 : static_cast<int64_t>(args.h * args.s_q * args.d_qk);
   fmha_args.batch_stride_dq = args.is_group_mode() ? 0 : args.stride_b_dq;
   fmha_args.batch_stride_dk = args.is_group_mode() ? 0 : (is_mqa_gqa? args.stride_b_dk_expanded : args.stride_b_dk);
   fmha_args.batch_stride_dv = args.is_group_mode() ? 0 : (is_mqa_gqa? args.stride_b_dv_expanded : args.stride_b_dv);
   // for dbias, use h since h can be different from bias_h
   fmha_args.batch_stride_dbias = args.is_group_mode() ? 0 : args.h * args.s_q * args.s_kv;
-  fmha_args.split_stride_dq_acc = static_cast<int>(args.is_group_mode() ? (args.max_tokens_q * args.h * args.d_qk) : (args.b * args.h * args.s_q * args.d_qk));
 
   fmha_args.window_size_left = args.window_size_left;
   fmha_args.window_size_right = args.window_size_right;
@@ -611,25 +677,55 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
       ck_log_config = true;
   }
   const char* dump_path = std::getenv("NVTE_DUMP_AITER_RT");
+  auto* log_file = get_ck_log_stream();
   // print kernel name on verbose mode
-  ck_tile::stream_config stream_config{stream, dump_path!=nullptr, get_ck_log_stream() != nullptr};
+  ck_tile::stream_config stream_config{stream, dump_path!=nullptr, log_file != nullptr};
 
   // modify the max_seqlen_q for better performance in 0-length cases
   // lse_workspace_ptr used as buffer
   if(const char* env_p = std::getenv("NVTE_CK_RUNTIME_MAX_SEQLEN")) {
     if(args.is_group_mode() && std::string(env_p) == "1"){
-      if(ck_log_config){
-        std::cout << "attn_bwd(ck): Enabling runtime max_seqlen calculation for small seqlen optimization.";
+      if(log_file){
+        *log_file << "attn_bwd(ck): Enabling runtime max_seqlen calculation for small seqlen optimization.";
       }
       fmha_args.max_seqlen_q = get_runtime_max_seqlen(args.b, args.cu_seqlen_q_ptr, nullptr, args.lse_workspace_ptr, stream);
       fmha_args.max_seqlen_k = get_runtime_max_seqlen(args.b, args.cu_seqlen_kv_ptr, nullptr, args.lse_workspace_ptr, stream);
     }
   }
 
+  // Device-side workspace for mha_bwd's internal allocations (launcher metadata
+  // and the dq_acc accumulator) is reserved ahead of time by the caller (see
+  // ck_attn_bwd_workspace_size) and carved here, matching the AOTriton bwd path.
+  // workspace_alloc bump-allocates from that buffer instead of allocating per
+  // call; only one allocation happens per dispatch, but the bump allocator stays
+  // correct if aiter splits the request.
+  void* ws_base = args.aiter_workspace_ptr;
+  const size_t ws_capacity = args.aiter_workspace_bytes;
+  size_t ws_offset = 0;
+  fmha_args.workspace_alloc = [ws_base, ws_capacity, &ws_offset, stream](size_t bytes, bool zero_init) -> void* {
+    if(bytes == 0){
+      return nullptr;
+    }
+    if(ws_base == nullptr || ws_offset + bytes > ws_capacity){
+      throw std::runtime_error("ck_fused_attn bwd: AITER workspace request exceeds reserved AOT buffer.");
+    }
+    void* ptr = static_cast<int8_t*>(ws_base) + ws_offset;
+    ws_offset += bytes;
+    // Honor aiter's zero_init hint; aiter zeroes the dq_acc region itself in
+    // prepare_workspace_async when the kernel requires it (deterministic splits,
+    // atomic-add accumulation), given a correctly sized workspace.
+    if(zero_init){
+      if(hipMemsetAsync(ptr, 0, bytes, stream) != hipSuccess){
+        throw std::runtime_error("ck_fused_attn bwd: hipMemsetAsync failed for AITER workspace.");
+      }
+    }
+    return ptr;
+  };
   // print ck traits and args when needed
-  if(ck_log_config){
-    log_bwd_config(__FUNCTION__, fmha_args);
+  if(log_file){
+    log_bwd_config(__FUNCTION__, fmha_args, log_file);
   }
+
   float average_runtime = QOLA_NS(mha_bwd)(fmha_args, stream_config);
   if(average_runtime < 0){
     //TODO: better error out system
@@ -646,7 +742,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
       dim3 grid(args.max_tokens_kv, args.hg);
       if(args.d_qk == args.d_v){
         dim3 block(args.d_qk);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_dv_reduce_thd: " << "\n";
           *log_file << "cu_seqlen_kv_ptr: " << args.cu_seqlen_kv_ptr << "\n";
           *log_file << "cu_seqlen_kv_padded_ptr: " << args.cu_seqlen_kv_padded_ptr << "\n";
@@ -673,7 +769,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
             args.stride_h_dk, args.stride_s_dk););
       } else {
         dim3 block_dk(args.d_qk);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_or_dv_reduce_thd on dk: " << "\n";
           *log_file << "cu_seqlen_kv_ptr: " << args.cu_seqlen_kv_ptr << "\n";
           *log_file << "cu_seqlen_kv_padded_ptr: " << args.cu_seqlen_kv_padded_ptr << "\n";
@@ -696,7 +792,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
             args.stride_h_dk, args.stride_s_dk););
 
         dim3 block_dv(args.d_v);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_or_dv_reduce_thd on dv: " << "\n";
           *log_file << "cu_seqlen_kv_ptr: " << args.cu_seqlen_kv_ptr << "\n";
           *log_file << "cu_seqlen_kv_padded_ptr: " << args.cu_seqlen_kv_padded_ptr << "\n";
@@ -722,7 +818,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
       dim3 grid(args.b, args.s_kv, args.hg);
       if(args.d_qk == args.d_v){
         dim3 block(args.d_qk);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_dv_reduce: " << "\n";
           *log_file << "dk_expanded_ptr: " << args.dk_expanded_ptr << "\n";
           *log_file << "dv_expanded_ptr: " << args.dv_expanded_ptr << "\n";
@@ -747,7 +843,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
             args.stride_b_dk, args.stride_h_dk, args.stride_s_dk););
       } else {
         dim3 block_dk(args.d_qk);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_or_dv_reduce on dk: " << "\n";
           *log_file << "dk_expanded_ptr: " << args.dk_expanded_ptr << "\n";
           *log_file << "stride_b_dk_expanded: " << args.stride_b_dk_expanded << "\n";
@@ -768,7 +864,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
             args.stride_b_dk, args.stride_h_dk, args.stride_s_dk););
 
         dim3 block_dv(args.d_v);
-        if (auto* log_file = get_ck_log_stream()) {
+        if (log_file) {
           *log_file << "\n" << "run dk_or_dv_reduce on dv: " << "\n";
           *log_file << "dv_expanded_ptr: " << args.dv_expanded_ptr << "\n";
           *log_file << "stride_b_dv_expanded: " << args.stride_b_dv_expanded << "\n";
@@ -798,7 +894,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
     dim3 block(THREADS_PER_BLOCK);
     dim3 grid(ceil(1.0 * args.s_q * args.s_kv / THREADS_PER_BLOCK));
     if(bias_shape==BiasShape::k11SS){
-      if (auto* log_file = get_ck_log_stream()) {
+      if (log_file) {
         *log_file << "\n" << "run dbias_reduce_11SS: " << "\n";
         *log_file << "dbias_ptr: " << args.dbias_ptr << "\n";
         *log_file << "dbias_expanded_ptr: " << args.dbias_expanded_ptr << "\n";
@@ -810,7 +906,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
           static_cast<CK_TILE_TYPE*>(args.dbias_expanded_ptr),
           static_cast<CK_TILE_TYPE*>(args.dbias_ptr)););
     }else if(bias_shape==BiasShape::k1HSS){
-      if (auto* log_file = get_ck_log_stream()) {
+      if (log_file) {
         *log_file << "\n" << "run dbias_reduce_1HSS: " << "\n";
         *log_file << "dbias_ptr: " << args.dbias_ptr << "\n";
         *log_file << "dbias_expanded_ptr: " << args.dbias_expanded_ptr << "\n";
@@ -822,7 +918,7 @@ hipError_t ck_attn_bwd(const CkAttnBwdArgs& args, hipStream_t stream){
           static_cast<CK_TILE_TYPE*>(args.dbias_expanded_ptr),
           static_cast<CK_TILE_TYPE*>(args.dbias_ptr)););
     }else if(bias_shape==BiasShape::kB1SS){
-      if (auto* log_file = get_ck_log_stream()) {
+      if (log_file) {
         *log_file << "\n" << "run dbias_reduce_B1SS: " << "\n";
         *log_file << "dbias_ptr: " << args.dbias_ptr << "\n";
         *log_file << "dbias_expanded_ptr: " << args.dbias_expanded_ptr << "\n";
diff --git a/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_fwd.cpp b/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_fwd.cpp
index 88e3bac91..59cb92982 100644
--- a/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_fwd.cpp
+++ b/transformer_engine/common/ck_fused_attn/src/ck_fused_attn_fwd.cpp
@@ -15,9 +15,8 @@
 namespace ck_fused_attn{
 
 // print the fmha traits and fmha_args when calling ck apis
-void log_fwd_config(const char* func_name, bool has_dropout, const aiter::mha_fwd_args& fmha_args){
+void log_fwd_config(const char* func_name, bool has_dropout, const aiter::mha_fwd_args& fmha_args, std::ostream* log_file){
 
-  std::ostream* log_file = get_ck_log_stream();
   (*log_file) << "\n" << func_name << "\n";
 
   // debug fmha_traits
@@ -234,6 +233,7 @@ hipError_t ck_attn_fwd(const CKAttnFwdArgs& args, hipStream_t stream){
       ck_log_config = true;
   }
   const char* dump_path = std::getenv("NVTE_DUMP_AITER_RT");
+  auto* log_file = get_ck_log_stream();
   // print kernel name on verbose mode
   ck_tile::stream_config stream_config{stream, dump_path!=nullptr, get_ck_log_stream() != nullptr};
 
@@ -241,16 +241,16 @@ hipError_t ck_attn_fwd(const CKAttnFwdArgs& args, hipStream_t stream){
 
   if(const char* env_p = std::getenv("NVTE_CK_RUNTIME_MAX_SEQLEN")){
     if(args.is_group_mode() && std::string(env_p) == "1"){
-      if(ck_log_config){
-        std::cout << "attn_fwd(ck): Enabling runtime max_seqlen calculation for small seqlen optimization.";
+      if(log_file){
+        *log_file << "attn_fwd(ck): Enabling runtime max_seqlen calculation for small seqlen optimization.";
       }
       fmha_args.max_seqlen_q = get_runtime_max_seqlen(args.b, args.cu_seqlen_q_ptr, args.cu_seqlen_q_padded_ptr, args.lse_ptr, stream);
     }
   }
 
   // print ck traits and fmha_args when needed
-  if(ck_log_config){
-     log_fwd_config(__FUNCTION__, has_dropout, fmha_args);
+  if(log_file){
+     log_fwd_config(__FUNCTION__, has_dropout, fmha_args, log_file);
   }
   float average_runtime = QOLA_NS(mha_fwd)(fmha_args, stream_config);
   if(average_runtime < 0){
diff --git a/transformer_engine/common/fused_attn_rocm/fused_attn.cpp b/transformer_engine/common/fused_attn_rocm/fused_attn.cpp
index b621d7174..30dedc4ed 100644
--- a/transformer_engine/common/fused_attn_rocm/fused_attn.cpp
+++ b/transformer_engine/common/fused_attn_rocm/fused_attn.cpp
@@ -279,7 +279,7 @@ NVTE_Fused_Attn_Backend nvte_get_fused_attn_backend(
     NVTE_Bias_Type bias_type, NVTE_Mask_Type attn_mask_type, NVTE_Softmax_Type softmax_type,
     float dropout, size_t num_attn_heads, size_t num_gqa_groups, size_t max_seqlen_q, 
     size_t max_seqlen_kv, size_t head_dim_qk, size_t head_dim_v, int64_t window_size_left, 
-    int64_t window_size_right, bool return_max_logit, bool cuda_graph, bool deterministic) {
+    int64_t window_size_right, bool return_max_logit, bool /*cuda_graph*/, bool deterministic) {
   using namespace transformer_engine;
 
   //gfx1250 is disabled in ck_fused_attn/CMakeLists.txt and is not supported by curretnt aotriton
@@ -347,7 +347,7 @@ void nvte_fused_attn_fwd(const NVTETensor Q, const NVTETensor K, const NVTETenso
                          const NVTETensor cu_seqlens_kv_padded, const NVTETensor page_table_k,
                          const NVTETensor page_table_v, const NVTETensor rng_state,
                          size_t max_seqlen_q, size_t max_seqlen_kv, bool is_training,
-                         bool return_max_logit, bool cuda_graph, float attn_scale, float dropout,
+                         bool return_max_logit, bool /*cuda_graph*/, float attn_scale, float dropout,
                          NVTE_QKV_Layout qkv_layout, NVTE_Bias_Type bias_type,
                          NVTE_Mask_Type attn_mask_type, NVTE_Softmax_Type softmax_type,
                          int64_t window_size_left, int64_t window_size_right,
@@ -390,7 +390,7 @@ void nvte_fused_attn_fwd(const NVTETensor Q, const NVTETensor K, const NVTETenso
   NVTE_Fused_Attn_Backend fused_attention_backend = nvte_get_fused_attn_backend(
       is_training, Q_type, KV_type, qkv_layout, bias_type, attn_mask_type, softmax_type, dropout,
       h_q, h_kv, max_seqlen_q, max_seqlen_kv, d_qk, d_v, window_size_left, window_size_right,
-      return_max_logit, cuda_graph, false);
+      return_max_logit, false /*Ignored*/, false);
 
   if (fused_attention_backend == NVTE_Fused_Attn_Backend::NVTE_CK) {
     fused_attn_ck_fwd(
@@ -437,7 +437,7 @@ void nvte_fused_attn_bwd(const NVTETensor Q, const NVTETensor K, const NVTETenso
                          NVTE_QKV_Layout qkv_layout, NVTE_Bias_Type bias_type,
                          NVTE_Mask_Type attn_mask_type, NVTE_Softmax_Type softmax_type,
                          int64_t window_size_left, int64_t window_size_right,
-                         bool bottom_right_diagonal, bool deterministic, bool cuda_graph,
+                         bool bottom_right_diagonal, bool deterministic, bool /*cuda_graph*/,
                          NVTETensor workspace, cudaStream_t stream) {
   NVTE_API_CALL(nvte_flash_attn_bwd);
   using namespace transformer_engine;
@@ -482,8 +482,8 @@ void nvte_fused_attn_bwd(const NVTETensor Q, const NVTETensor K, const NVTETenso
 
   NVTE_Fused_Attn_Backend fused_attention_backend = nvte_get_fused_attn_backend(
       true, Q_type, KV_type, qkv_layout, bias_type, attn_mask_type, softmax_type, dropout, h_q,
-      h_kv, max_seqlen_q, max_seqlen_kv, d_qk, d_v, window_size_left, window_size_right, false,
-      cuda_graph, deterministic);
+      h_kv, max_seqlen_q, max_seqlen_kv, d_qk, d_v, window_size_left, window_size_right, false /*Ignored*/,
+      false, deterministic);
 
   if (fused_attention_backend == NVTE_Fused_Attn_Backend::NVTE_CK) {
     if ((bias_type != NVTE_NO_BIAS) && (bias_type != NVTE_ALIBI)) {
diff --git a/transformer_engine/common/fused_attn_rocm/fused_attn_ck.cpp b/transformer_engine/common/fused_attn_rocm/fused_attn_ck.cpp
index 0c7d80a6a..58764b639 100644
--- a/transformer_engine/common/fused_attn_rocm/fused_attn_ck.cpp
+++ b/transformer_engine/common/fused_attn_rocm/fused_attn_ck.cpp
@@ -30,9 +30,9 @@ bool is_ck_backend_supported(
   float dropout,
   size_t num_attn_heads, size_t num_gqa_groups,
   size_t max_seqlen_q, size_t max_seqlen_kv,
-  size_t head_dim_qk, 
-  size_t head_dim_v, 
-  int64_t window_size_left, 
+  size_t head_dim_qk,
+  size_t head_dim_v,
+  int64_t window_size_left,
   int64_t window_size_right) {
 
 #ifdef USE_FUSED_ATTN_CK
@@ -724,9 +724,6 @@ void fused_attn_ck_bwd_impl(
 
   bool is_mqa_gqa = (h > hg);
 
-  size_t kN0 = (d_qk <= 128)? 128:64;
-  size_t nsplits = deterministic? ceil(1.0*s_kv/kN0):1;
-
   NVTE_QKV_Format qkv_format = nvte_get_qkv_format(layout);
   bool is_ragged = qkv_format==NVTE_QKV_Format::NVTE_THD;
   bool is_SBHD = qkv_format==NVTE_QKV_Format::NVTE_SBHD || qkv_format==NVTE_QKV_Format::NVTE_SBHD_2BSHD;
@@ -749,8 +746,33 @@ void fused_attn_ck_bwd_impl(
   // First h*max_tokens_q*sizeof(float) is the lse-d buffer (passed as softmax_lsed)
   void* lse_workspace = planner.allocate(h*max_tokens_q*sizeof(float));
 
-  // CK requires dq_acc ptr; size depends on deterministic mode
-  void* dq_acc_ptr = planner.allocate(nsplits*h*max_tokens_q*d_qk*sizeof(float));
+  // Reserve AOT scratch for AITER's internal bwd workspace (launcher metadata +
+  // dq_acc accumulator), carved by ck_attn_bwd's workspace_alloc callback instead
+  // of allocated per call. The size is a pure host-side query; the full ck_args
+  // built below (execution pass only) carries the pointer into the dispatch, so
+  // assemble just the trait-bearing fields here.
+  ck_fused_attn::CkAttnBwdArgs ws_size_args;
+  ws_size_args.dtype = nvte_to_ck_dtype(dtype);
+  ws_size_args.b = b; ws_size_args.h = h; ws_size_args.hg = hg;
+  ws_size_args.s_q = s_q; ws_size_args.s_kv = s_kv; ws_size_args.d_qk = d_qk; ws_size_args.d_v = d_v;
+  ws_size_args.max_tokens_q = max_tokens_q; ws_size_args.max_tokens_kv = max_tokens_kv;
+  ws_size_args.attn_mask_type = set_ck_mask(mask_type, window_size_left, window_size_right);
+  ws_size_args.dropout_probability = dropout_probability;
+  ws_size_args.deterministic = deterministic;
+  ws_size_args.uses_bwd_v3 = nvte_ck_uses_bwd_v3;
+  ws_size_args.is_v3_atomic_fp32 = nvte_ck_is_v3_atomic_fp32;
+  ws_size_args.how_v3_bf16_cvt = nvte_ck_how_v3_bf16_cvt;
+  ws_size_args.dbias_ptr = devPtrdBias;
+  if((is_SBHD && is_padding) || bshd_to_thd || is_ragged){
+    // group mode: a non-null cu_seqlen flips is_group_mode(); bias is forced off
+    ws_size_args.cu_seqlen_q_ptr = devPtrCuSeqlensQ;
+  }else{
+    // batch mode: bias shape feeds the trait/workspace sizing
+    ws_size_args.attn_bias_type = nvte_to_ck_bias_type(bias_type);
+    ws_size_args.bias_b = bias_b; ws_size_args.bias_h = bias_h;
+  }
+  const size_t aiter_workspace_bytes = ck_fused_attn::ck_attn_bwd_workspace_size(ws_size_args);
+  void* aiter_workspace = planner.allocate(aiter_workspace_bytes);
 
   void* dk_expanded_ptr = nullptr;
   void* dv_expanded_ptr = nullptr;
@@ -892,8 +914,13 @@ void fused_attn_ck_bwd_impl(
   }
 
   // Initialize workspace buffers.
-  // dq_acc is of shape (nsplits, B, S, H, D_qk); CK requires zeroing
-  NVTE_CHECK_CUDA(cudaMemsetAsync(dq_acc_ptr, 0, sizeof(float)*nsplits*h*max_tokens_q*d_qk, stream));
+  // dk_expanded/dv_expanded scratch is written only for valid KV rows by the GQA
+  // main kernel, but the post-dispatch reduction reads every row; pre-zero so
+  // masked/padded rows don't feed uninitialized workspace into dk/dv (-> NaN).
+  if(dk_expanded_ptr){
+    NVTE_CHECK_CUDA(cudaMemsetAsync(dk_expanded_ptr, 0,
+        max_tokens_kv*h*(d_qk+d_v)*nvte_dtype_size(dtype), stream));
+  }
   if(devPtrAlibiSlope){
     dim3 block, grid;
     block.x = 1024;
@@ -971,10 +998,11 @@ void fused_attn_ck_bwd_impl(
   ck_args.attn_mask_type = set_ck_mask(mask_type, window_size_left, window_size_right);
   ck_args.window_size_left = window_size_left;
   ck_args.window_size_right = window_size_right;
-  ck_args.dq_acc_ptr = dq_acc_ptr;
   ck_args.dk_expanded_ptr = dk_expanded_ptr;
   ck_args.dv_expanded_ptr = dv_expanded_ptr;
   ck_args.lse_workspace_ptr = lse_workspace;
+  ck_args.aiter_workspace_ptr = aiter_workspace;
+  ck_args.aiter_workspace_bytes = aiter_workspace_bytes;
   ck_args.deterministic = deterministic;
   ck_args.uses_bwd_v3 = nvte_ck_uses_bwd_v3;
   ck_args.is_v3_atomic_fp32 = nvte_ck_is_v3_atomic_fp32;
diff --git a/transformer_engine/common/fused_attn_rocm/fused_attn_ck.h b/transformer_engine/common/fused_attn_rocm/fused_attn_ck.h
index 7aafc883f..e98281d1a 100644
--- a/transformer_engine/common/fused_attn_rocm/fused_attn_ck.h
+++ b/transformer_engine/common/fused_attn_rocm/fused_attn_ck.h
@@ -26,9 +26,9 @@ bool is_ck_backend_supported(
   float dropout,
   size_t num_attn_heads, size_t num_gqa_groups,
   size_t max_seqlen_q, size_t max_seqlen_kv,
-  size_t head_dim_qk, 
-  size_t head_dim_v, 
-  int64_t window_size_left, 
+  size_t head_dim_qk,
+  size_t head_dim_v,
+  int64_t window_size_left,
   int64_t window_size_right);
 }  // namespace fused_attn_rocm
 
diff --git a/transformer_engine/jax/csrc/extensions/attention.cpp b/transformer_engine/jax/csrc/extensions/attention.cpp
index 02efd1b38..5de843248 100644
--- a/transformer_engine/jax/csrc/extensions/attention.cpp
+++ b/transformer_engine/jax/csrc/extensions/attention.cpp
@@ -471,6 +471,21 @@ pybind11::tuple GetFusedAttnBackwardWorkspaceSizes(
     min_num_segments = input_batch * max_segments_per_seq;
   }
 
+  void *cu_seqlens_sizing_sentinel = nullptr;
+#ifdef USE_ROCM
+  // ROCm CK: the deterministic CK bwd workspace size differs between group and batch mode, and
+  // is_group_mode() keys off a non-null cu_seqlens pointer. The real cu_seqlens are unavailable at
+  // this lowering-time sizing pass, so with a null pointer JAX would size the workspace for batch
+  // mode while execution runs in group mode -> under-allocated dq_acc -> OOB write into the forward
+  // output. For group-mode configs (ragged/THD or a padding mask) pass a non-null sentinel so the
+  // sizing pass matches execution. The pointer is only null-checked (never dereferenced) here.
+  const bool mask_is_padding = (mask_type == NVTE_Mask_Type::NVTE_PADDING_MASK ||
+                                mask_type == NVTE_Mask_Type::NVTE_PADDING_CAUSAL_MASK ||
+                                mask_type == NVTE_Mask_Type::NVTE_PADDING_CAUSAL_BOTTOM_RIGHT_MASK);
+  cu_seqlens_sizing_sentinel =
+      (is_ragged || mask_is_padding) ? reinterpret_cast<void *>(alignof(int32_t)) : nullptr;
+#endif  // USE_ROCM
+
   TensorWrapper dummy_d_softmax_offset_tensor;
   if (softmax_type == NVTE_Softmax_Type::NVTE_OFF_BY_ONE_SOFTMAX ||
       softmax_type == NVTE_Softmax_Type::NVTE_LEARNABLE_SOFTMAX) {
@@ -480,10 +495,10 @@ pybind11::tuple GetFusedAttnBackwardWorkspaceSizes(
 
   for (auto num_segments = min_num_segments; num_segments <= max_num_segments; ++num_segments) {
     // the last one is the largest which will be the returned workspace size
-    auto q_cu_seqlens_tensor =
-        TensorWrapper(nullptr, std::vector<size_t>{num_segments + 1}, DType::kInt32);
-    auto kv_cu_seqlens_tensor =
-        TensorWrapper(nullptr, std::vector<size_t>{num_segments + 1}, DType::kInt32);
+    auto q_cu_seqlens_tensor = TensorWrapper(cu_seqlens_sizing_sentinel,
+                                             std::vector<size_t>{num_segments + 1}, DType::kInt32);
+    auto kv_cu_seqlens_tensor = TensorWrapper(cu_seqlens_sizing_sentinel,
+                                              std::vector<size_t>{num_segments + 1}, DType::kInt32);
     auto dummy_ragged_offset_tensor =
         TensorWrapper(nullptr, std::vector<size_t>{num_segments + 1}, DType::kInt32);