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Using Cortex-Debug for Espressif esp32s3 devices #1250

Description

@SparePartsBin

I am trying to start a VScode Cortex-Debug session using an esp32s3-DevKitC-1. In simplest terms, I need to use the Espressif version of openocd. My problem is that I want to start the Espressif openocd either in a terminal (manually works fine) and "attach" via launch.json. My problem is that Cortex-Debug ignores the attach request with the servertype openocd. It always goes to request->launch. When this happens there is no way to include configuration files (ignored as well). Cortex-Debug posts the following message, "At least one OpenOCD Configuration File must be specified." The system path to the Espressif openocd executable is correct as Cortex-Debug requires. What needs to be done that I'm overlooking?

    {
        "name": "ESP32-S3 Cortex Debug (openocd)",
        "type": "cortex-debug", //NOTE: if I change this to "cppdebug"
        "request": "attach",        // and this to launch. There are no problems.
        "servertype": "openocd",

        "executable": "${workspaceFolder}/build/ReSpeakerWifiBLE.elf",
        "gdbPath": "C:/Espressif/tools/xtensa-esp-elf/esp-15.2.0_20251204/xtensa-esp-elf/bin/xtensa-esp32s3-elf-gdb.exe",
        "gdbTarget": "localhost:3333",

        "postAttachCommands": [
            "echo ATTACH_MODE_ACTIVE",
            "monitor reset halt"
        ],

        "showDevDebugOutput": "raw"
    },

The expected behaviour is to get the attach pop-up and scroll to the openocd.exe.

In Terminal:
Executing task: C:/Espressif/tools/openocd-esp32/bin/openocd.exe -f board/esp32s3-builtin.cfg

Open On-Chip Debugger v0.12.0-esp32-20260703 (2026-07-03-13:40)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : esp_usb_jtag: capabilities descriptor set to 0x2000
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : esp_usb_jtag: serial (38:44:BE:CD:61:88)
Info : esp_usb_jtag: Device found. Base speed 40000KHz, div range 1 to 255
Info : clock speed 40000 kHz
Info : JTAG tap: esp32s3.tap0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : JTAG tap: esp32s3.tap1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1)
Info : [esp32s3.cpu0] Examination succeed
Info : [esp32s3.cpu1] Examination succeed
Info : [esp32s3.cpu0] starting gdb server on 3333
Info : Listening on port 3333 for gdb connections
Info : [esp32s3.cpu0] Target halted, PC=0x40000400, debug_reason=00000001
Info : [esp32s3.cpu0] Reset cause (3) - (Software core reset)
Info : Set GDB target to 'esp32s3.cpu0'
Info : [esp32s3.cpu1] Target halted, PC=0x40000400, debug_reason=00000000
Info : [esp32s3.cpu1] Reset cause (3) - (Software core reset)
Info : [esp32s3.cpu1] Chip revision v0.2

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