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u-boot: update Rockchip patches for 2026.01
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
1 parent 9b62661 commit 5062b50

56 files changed

Lines changed: 981 additions & 9116 deletions

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projects/Rockchip/patches/u-boot/rockchip-0051-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch renamed to projects/Rockchip/patches/u-boot/rockchip-0001-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch

Lines changed: 3 additions & 3 deletions
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@@ -1,7 +1,7 @@
1-
From f836ef75bb0e244dfae545316053a8dec9898822 Mon Sep 17 00:00:00 2001
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From ff49d5eedc11a7d36ea81c7258c8e40f9c27c6d7 Mon Sep 17 00:00:00 2001
22
From: Alex Bee <knaerzche@gmail.com>
33
Date: Mon, 31 Oct 2022 17:13:47 +0100
4-
Subject: [PATCH 51/51] KNAERZCHE: rockchip: rk3288: Pick SD card as first boot
4+
Subject: [PATCH 01/15] KNAERZCHE: rockchip: rk3288: Pick SD card as first boot
55
device
66

77
In order to be able to boot from SD card at SPL level, always check
@@ -26,5 +26,5 @@ index bb0078588fe..3ec97f07c37 100644
2626

2727
dmc: dmc@ff610000 {
2828
--
29-
2.34.1
29+
2.43.0
3030

projects/Rockchip/patches/u-boot/rockchip-0001-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch renamed to projects/Rockchip/patches/u-boot/rockchip-0002-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch

Lines changed: 7 additions & 4 deletions
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@@ -1,12 +1,15 @@
1-
From c5acd84ed6c4c23bb4d4b876b57c7140eafc4f9a Mon Sep 17 00:00:00 2001
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From 78b82989630aada65967e70e1839111fd3b193d8 Mon Sep 17 00:00:00 2001
22
From: Jonas Karlman <jonas@kwiboo.se>
3-
Date: Sun, 20 Jul 2025 13:09:38 +0000
4-
Subject: [PATCH 01/51] phy: rockchip: naneng-combphy: Enable U3 port for
3+
Date: Sun, 19 Oct 2025 15:09:40 +0000
4+
Subject: [PATCH 02/15] phy: rockchip: naneng-combphy: Enable U3 port for
55
USB3OTG on RK3568
66

77
The USB OTG U3 port may have been disabled early, add support to the
88
COMBPHY driver to re-enable the U3 port.
99

10+
This matches changes made in the Linux commit 7bb14b61b7d0 ("phy:
11+
rockchip: naneng-combphy: Enable U3 OTG port for RK3568").
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1013
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
1114
---
1215
drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++++++
@@ -32,5 +35,5 @@ index d602f965d6a..82353ae7678 100644
3235
case PHY_TYPE_SATA:
3336
writel(0x41, priv->mmio + 0x38);
3437
--
35-
2.34.1
38+
2.43.0
3639

projects/Rockchip/patches/u-boot/rockchip-0002-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch

Lines changed: 0 additions & 49 deletions
This file was deleted.

projects/Rockchip/patches/u-boot/rockchip-0003-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch

Lines changed: 0 additions & 113 deletions
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@@ -0,0 +1,94 @@
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From ad8dfdcb5a3fe3c6a90d3ae0f1363398dadc72f5 Mon Sep 17 00:00:00 2001
2+
From: Jonas Karlman <jonas@kwiboo.se>
3+
Date: Sat, 2 Aug 2025 22:07:24 +0000
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Subject: [PATCH 03/15] rockchip: sdram: Add fallback that fixup DRAM gaps on
5+
RK3588
6+
7+
RK3588 has two known memory gaps when using 16+ GiB DRAM,
8+
[0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).
9+
10+
The vendor TPL blob encodes this information in the DDR_MEM tag data
11+
passed to later boot phases. U-Boot proper will normally use this
12+
information to configure the DRAM banks.
13+
14+
When a DDR_MEM tag cannot be found the fallback is to use the entire
15+
range above 4 GiB. Something that will cause issues when OS try to use
16+
memory from the two known memory gaps.
17+
18+
Add a weak dram init banksize fixup function and implement it for RK3588
19+
to fix issues observed when trying to RAM boot RK3588 boards with 16+
20+
GiB DRAM into Linux.
21+
22+
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
23+
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
24+
---
25+
arch/arm/mach-rockchip/rk3588/rk3588.c | 27 ++++++++++++++++++++++++++
26+
arch/arm/mach-rockchip/sdram.c | 7 ++++++-
27+
2 files changed, 33 insertions(+), 1 deletion(-)
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29+
diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
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index 55d2caab4fe..6324c6f1286 100644
31+
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
32+
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
33+
@@ -211,6 +211,33 @@ int arch_cpu_init(void)
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}
35+
#endif
36+
37+
+/*
38+
+ * RK3588 has two known memory gaps when using 16+ GiB DRAM,
39+
+ * [0x3fc000000, 0x3fc500000) and [0x3fff00000, 0x400000000).
40+
+ *
41+
+ * Remove the [0x3fc000000, 0x400000000) range to ensure OS does not
42+
+ * use memory from these gaps when a DDR_MEM tag cannot be found.
43+
+ */
44+
+
45+
+#define DRAM_GAP_START 0x3FC000000
46+
+#define DRAM_GAP_END 0x400000000
47+
+
48+
+int rockchip_dram_init_banksize_fixup(struct bd_info *bd)
49+
+{
50+
+ size_t ram_top = bd->bi_dram[1].start + bd->bi_dram[1].size;
51+
+
52+
+ if (ram_top > DRAM_GAP_START) {
53+
+ bd->bi_dram[1].size = DRAM_GAP_START - bd->bi_dram[1].start;
54+
+
55+
+ if (ram_top > DRAM_GAP_END && CONFIG_NR_DRAM_BANKS > 2) {
56+
+ bd->bi_dram[2].start = DRAM_GAP_END;
57+
+ bd->bi_dram[2].size = ram_top - bd->bi_dram[2].start;
58+
+ }
59+
+ }
60+
+
61+
+ return 0;
62+
+}
63+
+
64+
#define RK3588_OTP_CPU_CODE_OFFSET 0x02
65+
#define RK3588_OTP_SPECIFICATION_OFFSET 0x06
66+
67+
diff --git a/arch/arm/mach-rockchip/sdram.c b/arch/arm/mach-rockchip/sdram.c
68+
index d560f90e873..ea0e3621af7 100644
69+
--- a/arch/arm/mach-rockchip/sdram.c
70+
+++ b/arch/arm/mach-rockchip/sdram.c
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@@ -289,6 +289,11 @@ static int rockchip_dram_init_banksize(void)
72+
}
73+
#endif
74+
75+
+__weak int rockchip_dram_init_banksize_fixup(struct bd_info *bd)
76+
+{
77+
+ return 0;
78+
+}
79+
+
80+
int dram_init_banksize(void)
81+
{
82+
size_t ram_top = (unsigned long)(gd->ram_size + CFG_SYS_SDRAM_BASE);
83+
@@ -342,7 +347,7 @@ int dram_init_banksize(void)
84+
#endif
85+
#endif
86+
87+
- return 0;
88+
+ return rockchip_dram_init_banksize_fixup(gd->bd);
89+
}
90+
91+
u8 rockchip_sdram_type(phys_addr_t reg)
92+
--
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2.43.0
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