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Fix arm floating-point status register code
* Use an actual compiler definition to determine whether we have a floating-point unit or not. * Use a modern (VFPU) assembly instruction to get/set the fpsr * If we don't have an fpsr, at least zero out the return value
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Lines changed: 6 additions & 4 deletions

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include/openlibm_fenv_arm.h

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -69,11 +69,13 @@ extern const fenv_t __fe_dfl_env;
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#if defined(__aarch64__)
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#define __rfs(__fpsr) __asm __volatile("mrs %0,fpsr" : "=r" (*(__fpsr)))
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#define __wfs(__fpsr) __asm __volatile("msr fpsr,%0" : : "r" (__fpsr))
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#elif defined(ARM_HARD_FLOAT)
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#define __rfs(__fpsr) __asm __volatile("rfs %0" : "=r" (*(__fpsr)))
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#define __wfs(__fpsr) __asm __volatile("wfs %0" : : "r" (__fpsr))
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/* Test for hardware support for ARM floating point operations, explicitly
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checking for float and double support, see "ARM C Language Extensions", 6.5.1 */
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#elif defined(__ARM_FP) && (__ARM_FP & 0x0C) != 0
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#define __rfs(__fpsr) __asm __volatile("vmrs %0,fpscr" : "=&r" (*(__fpsr)))
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#define __wfs(__fpsr) __asm __volatile("vmsr fpscr,%0" : : "r" (__fpsr))
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#else
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#define __rfs(__fpsr)
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#define __rfs(__fpsr) (*(__fpsr) = 0)
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#define __wfs(__fpsr)
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#endif
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