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1 | | -#include "cdefs-compat.h" |
2 | | -#include "amd64/bsd_ieeefp.h" |
| 1 | +/*- |
| 2 | + * Copyright (c) 2003 Peter Wemm. |
| 3 | + * Copyright (c) 1990 Andrew Moore, Talke Studio |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * Redistribution and use in source and binary forms, with or without |
| 7 | + * modification, are permitted provided that the following conditions |
| 8 | + * are met: |
| 9 | + * 1. Redistributions of source code must retain the above copyright |
| 10 | + * notice, this list of conditions and the following disclaimer. |
| 11 | + * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | + * notice, this list of conditions and the following disclaimer in the |
| 13 | + * documentation and/or other materials provided with the distribution. |
| 14 | + * 3. All advertising materials mentioning features or use of this software |
| 15 | + * must display the following acknowledgement: |
| 16 | + * This product includes software developed by the University of |
| 17 | + * California, Berkeley and its contributors. |
| 18 | + * 4. Neither the name of the University nor the names of its contributors |
| 19 | + * may be used to endorse or promote products derived from this software |
| 20 | + * without specific prior written permission. |
| 21 | + * |
| 22 | + * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND |
| 23 | + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 24 | + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | + * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE |
| 26 | + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 27 | + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 28 | + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 29 | + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 30 | + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 31 | + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 32 | + * SUCH DAMAGE. |
| 33 | + * |
| 34 | + * from: @(#) ieeefp.h 1.0 (Berkeley) 9/23/93 |
| 35 | + * $FreeBSD$ |
| 36 | + */ |
| 37 | + |
| 38 | +#ifndef _MACHINE_IEEEFP_H_ |
| 39 | +#define _MACHINE_IEEEFP_H_ |
| 40 | + |
| 41 | +/* |
| 42 | + * Deprecated historical FPU control interface |
| 43 | + * |
| 44 | + * IEEE floating point type, constant and function definitions. |
| 45 | + * XXX: FP*FLD and FP*OFF are undocumented pollution. |
| 46 | + */ |
| 47 | + |
| 48 | +#ifndef _SYS_CDEFS_H_ |
| 49 | +#error this file needs sys/cdefs.h as a prerequisite |
| 50 | +#endif |
| 51 | + |
| 52 | +/* |
| 53 | + * Rounding modes. |
| 54 | + */ |
| 55 | +typedef enum { |
| 56 | + FP_RN=0, /* round to nearest */ |
| 57 | + FP_RM, /* round down towards minus infinity */ |
| 58 | + FP_RP, /* round up towards plus infinity */ |
| 59 | + FP_RZ /* truncate */ |
| 60 | +} fp_rnd_t; |
| 61 | + |
| 62 | +/* |
| 63 | + * Precision (i.e., rounding precision) modes. |
| 64 | + */ |
| 65 | +typedef enum { |
| 66 | + FP_PS=0, /* 24 bit (single-precision) */ |
| 67 | + FP_PRS, /* reserved */ |
| 68 | + FP_PD, /* 53 bit (double-precision) */ |
| 69 | + FP_PE /* 64 bit (extended-precision) */ |
| 70 | +} fp_prec_t; |
| 71 | + |
| 72 | +#define fp_except_t int |
| 73 | + |
| 74 | +/* |
| 75 | + * Exception bit masks. |
| 76 | + */ |
| 77 | +#define FP_X_INV 0x01 /* invalid operation */ |
| 78 | +#define FP_X_DNML 0x02 /* denormal */ |
| 79 | +#define FP_X_DZ 0x04 /* zero divide */ |
| 80 | +#define FP_X_OFL 0x08 /* overflow */ |
| 81 | +#define FP_X_UFL 0x10 /* underflow */ |
| 82 | +#define FP_X_IMP 0x20 /* (im)precision */ |
| 83 | +#define FP_X_STK 0x40 /* stack fault */ |
| 84 | + |
| 85 | +/* |
| 86 | + * FPU control word bit-field masks. |
| 87 | + */ |
| 88 | +#define FP_MSKS_FLD 0x3f /* exception masks field */ |
| 89 | +#define FP_PRC_FLD 0x300 /* precision control field */ |
| 90 | +#define FP_RND_FLD 0xc00 /* rounding control field */ |
| 91 | + |
| 92 | +/* |
| 93 | + * FPU status word bit-field masks. |
| 94 | + */ |
| 95 | +#define FP_STKY_FLD 0x3f /* sticky flags field */ |
| 96 | + |
| 97 | +/* |
| 98 | + * FPU control word bit-field offsets (shift counts). |
| 99 | + */ |
| 100 | +#define FP_MSKS_OFF 0 /* exception masks offset */ |
| 101 | +#define FP_PRC_OFF 8 /* precision control offset */ |
| 102 | +#define FP_RND_OFF 10 /* rounding control offset */ |
| 103 | + |
| 104 | +/* |
| 105 | + * FPU status word bit-field offsets (shift counts). |
| 106 | + */ |
| 107 | +#define FP_STKY_OFF 0 /* sticky flags offset */ |
| 108 | + |
| 109 | +#ifdef __GNUCLIKE_ASM |
| 110 | + |
| 111 | +#define __fldcw(addr) __asm __volatile("fldcw %0" : : "m" (*(addr))) |
| 112 | +#define __fldenv(addr) __asm __volatile("fldenv %0" : : "m" (*(addr))) |
| 113 | +#define __fnclex() __asm __volatile("fnclex") |
| 114 | +#define __fnstcw(addr) __asm __volatile("fnstcw %0" : "=m" (*(addr))) |
| 115 | +#define __fnstenv(addr) __asm __volatile("fnstenv %0" : "=m" (*(addr))) |
| 116 | +#define __fnstsw(addr) __asm __volatile("fnstsw %0" : "=m" (*(addr))) |
| 117 | + |
| 118 | +/* |
| 119 | + * Load the control word. Be careful not to trap if there is a currently |
| 120 | + * unmasked exception (ones that will become freshly unmasked are not a |
| 121 | + * problem). This case must be handled by a save/restore of the |
| 122 | + * environment or even of the full x87 state. Accessing the environment |
| 123 | + * is very inefficient, so only do it when necessary. |
| 124 | + */ |
| 125 | +static __inline void |
| 126 | +__fnldcw(unsigned short _cw, unsigned short _newcw) |
| 127 | +{ |
| 128 | + struct { |
| 129 | + unsigned _cw; |
| 130 | + unsigned _other[6]; |
| 131 | + } _env; |
| 132 | + unsigned short _sw; |
| 133 | + |
| 134 | + if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) { |
| 135 | + __fnstsw(&_sw); |
| 136 | + if (((_sw & ~_cw) & FP_STKY_FLD) != 0) { |
| 137 | + __fnstenv(&_env); |
| 138 | + _env._cw = _newcw; |
| 139 | + __fldenv(&_env); |
| 140 | + return; |
| 141 | + } |
| 142 | + } |
| 143 | + __fldcw(&_newcw); |
| 144 | +} |
| 145 | + |
| 146 | +static __inline fp_rnd_t |
| 147 | +fpgetround(void) |
| 148 | +{ |
| 149 | + unsigned short _cw; |
| 150 | + |
| 151 | + __fnstcw(&_cw); |
| 152 | + return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF)); |
| 153 | +} |
| 154 | + |
| 155 | +static __inline fp_rnd_t |
| 156 | +fpsetround(fp_rnd_t _m) |
| 157 | +{ |
| 158 | + fp_rnd_t _p; |
| 159 | + unsigned short _cw, _newcw; |
| 160 | + |
| 161 | + __fnstcw(&_cw); |
| 162 | + _p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF); |
| 163 | + _newcw = _cw & ~FP_RND_FLD; |
| 164 | + _newcw |= (_m << FP_RND_OFF) & FP_RND_FLD; |
| 165 | + __fnldcw(_cw, _newcw); |
| 166 | + return (_p); |
| 167 | +} |
| 168 | + |
| 169 | +static __inline fp_prec_t |
| 170 | +fpgetprec(void) |
| 171 | +{ |
| 172 | + unsigned short _cw; |
| 173 | + |
| 174 | + __fnstcw(&_cw); |
| 175 | + return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF)); |
| 176 | +} |
| 177 | + |
| 178 | +static __inline fp_prec_t |
| 179 | +fpsetprec(fp_prec_t _m) |
| 180 | +{ |
| 181 | + fp_prec_t _p; |
| 182 | + unsigned short _cw, _newcw; |
| 183 | + |
| 184 | + __fnstcw(&_cw); |
| 185 | + _p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF); |
| 186 | + _newcw = _cw & ~FP_PRC_FLD; |
| 187 | + _newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD; |
| 188 | + __fnldcw(_cw, _newcw); |
| 189 | + return (_p); |
| 190 | +} |
| 191 | + |
| 192 | +/* |
| 193 | + * Get or set the exception mask. |
| 194 | + * Note that the x87 mask bits are inverted by the API -- a mask bit of 1 |
| 195 | + * means disable for x87 and SSE, but for fp*mask() it means enable. |
| 196 | + */ |
| 197 | + |
| 198 | +static __inline fp_except_t |
| 199 | +fpgetmask(void) |
| 200 | +{ |
| 201 | + unsigned short _cw; |
| 202 | + |
| 203 | + __fnstcw(&_cw); |
| 204 | + return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF); |
| 205 | +} |
| 206 | + |
| 207 | +static __inline fp_except_t |
| 208 | +fpsetmask(fp_except_t _m) |
| 209 | +{ |
| 210 | + fp_except_t _p; |
| 211 | + unsigned short _cw, _newcw; |
| 212 | + |
| 213 | + __fnstcw(&_cw); |
| 214 | + _p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF; |
| 215 | + _newcw = _cw & ~FP_MSKS_FLD; |
| 216 | + _newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD; |
| 217 | + __fnldcw(_cw, _newcw); |
| 218 | + return (_p); |
| 219 | +} |
| 220 | + |
| 221 | +static __inline fp_except_t |
| 222 | +fpgetsticky(void) |
| 223 | +{ |
| 224 | + unsigned _ex; |
| 225 | + unsigned short _sw; |
| 226 | + |
| 227 | + __fnstsw(&_sw); |
| 228 | + _ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF; |
| 229 | + return ((fp_except_t)_ex); |
| 230 | +} |
| 231 | + |
| 232 | +static __inline fp_except_t |
| 233 | +fpresetsticky(fp_except_t _m) |
| 234 | +{ |
| 235 | + struct { |
| 236 | + unsigned _cw; |
| 237 | + unsigned _sw; |
| 238 | + unsigned _other[5]; |
| 239 | + } _env; |
| 240 | + fp_except_t _p; |
| 241 | + |
| 242 | + _m &= FP_STKY_FLD >> FP_STKY_OFF; |
| 243 | + _p = fpgetsticky(); |
| 244 | + if ((_p & ~_m) == _p) |
| 245 | + return (_p); |
| 246 | + if ((_p & ~_m) == 0) { |
| 247 | + __fnclex(); |
| 248 | + return (_p); |
| 249 | + } |
| 250 | + __fnstenv(&_env); |
| 251 | + _env._sw &= ~_m; |
| 252 | + __fldenv(&_env); |
| 253 | + return (_p); |
| 254 | +} |
| 255 | + |
| 256 | +#endif /* __GNUCLIKE_ASM */ |
| 257 | + |
| 258 | +#endif /* !_MACHINE_IEEEFP_H_ */ |
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