Status: Not yet implemented (Phase 28+ backlog). This document captures the proposed Blackwell support surface; nothing in
forgelm/ships any of the items below today.expandable_segmentswiring, thescripts/setup_for_blackwell.shsetup script, the auto-detect path inforgelm/model.py, and the bf16 + sequence-packing auto-enable flow are all pending. Operators on Blackwell hardware currently configureexpandable_segmentsvia the upstreamPYTORCH_ALLOC_CONFenv var directly and settraining.bf16: true/training.packing: trueby hand.
Specific optimizations for the latest Nvidia Blackwell architecture (notably GB10 with 128GB unified RAM) to maximize throughput and stability.
- Memory Management:
- Expose
expandable_segmentsin thePYTORCH_ALLOC_CONFviaconfig.yaml. - This prevents memory fragmentation during long-sequence training on unified memory architectures.
- Expose
- Environment Setup:
scripts/setup_for_blackwell.sh: A script that installs PyTorch nightly builds and CUDA 13.0 dependencies specifically for Blackwell.
- Hyperparameter Tuning:
- Automatically enable
bf16andsequence packingwhen Blackwell is detected, as these are first-class citizens in this architecture.
- Automatically enable
- Update
forgelm/utils.pyto include a helper for environment variable management. - Update
forgelm/model.pyto auto-detect hardware capabilities and warn if sub-optimal flags are set.