From 0c1b42e1154941f993e5b93405a50a37c71f9c70 Mon Sep 17 00:00:00 2001 From: Jeff Daily Date: Sat, 8 Aug 2026 18:55:22 +0000 Subject: [PATCH 1/5] mcx: move its deferrals into the project folder A deferral is discovered while porting and is evidence about THIS port, so it lives with the notes and the plan it came out of and is reviewed with them, rather than in a trunk-global file only the trunk can write. --- projects/mcx/deferred.json | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 projects/mcx/deferred.json diff --git a/projects/mcx/deferred.json b/projects/mcx/deferred.json new file mode 100644 index 00000000..593c72d7 --- /dev/null +++ b/projects/mcx/deferred.json @@ -0,0 +1,18 @@ +{ + "schema_version": 1, + "items": [ + { + "id": "hipcc-frontend-codegen-mcx", + "kind": "rocm-bug-report", + "component": "rocm-compiler", + "summary": "hipcc (C++/HIP frontend) emits ~3.4x more dynamic instructions than the OpenCL-C frontend for the equivalent MCX photon kernel on the same gfx90a backend; root cause of mcx-vs-mcxcl 4.6x gap after the atomics fix. Reduced repro + ISA/counter evidence + porting playbook prepared.", + "refs": [ + "findings/hipcc-frontend-codegen-mcx/README.md" + ], + "status": "open", + "upstream_issue": null, + "created_at": "2026-06-17T15:23:27Z", + "decided": null + } + ] +} From 67b6c0a394b9abde96b13f9673c8b7ca8e4cb935 Mon Sep 17 00:00:00 2001 From: Jeff Daily Date: Sun, 9 Aug 2026 00:18:40 +0000 Subject: [PATCH 2/5] mcx: keep this branch's project state across the trunk merge --- projects/mcx/notes.md | 885 +++++++++++++++++++++++++++++++++++++++ projects/mcx/plan.md | 242 +++++++++++ projects/mcx/stats.jsonl | 88 ++++ projects/mcx/status.json | 131 ++++++ 4 files changed, 1346 insertions(+) create mode 100644 projects/mcx/notes.md create mode 100644 projects/mcx/plan.md create mode 100644 projects/mcx/stats.jsonl create mode 100644 projects/mcx/status.json diff --git a/projects/mcx/notes.md b/projects/mcx/notes.md new file mode 100644 index 00000000..113c1748 --- /dev/null +++ b/projects/mcx/notes.md @@ -0,0 +1,885 @@ +# mcx notes + +## Build (gfx90a) + +```bash +cd projects/mcx/src +mkdir build && cd build +cmake ../src -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +## Test + +```bash +HIP_VISIBLE_DEVICES=0 ./bin/mcx -L +HIP_VISIBLE_DEVICES=0 ./bin/mcx --bench cube60 -n 1e6 +``` + +## Validation notes + +Core simulation validates correctly. Test suite: 29/40 tests pass. + +Working benchmarks (verified physics results): +- cube60 (no reflection): absorbed 17.72% @ 1e7 photons -- expected ~17% +- spherebox: absorbed 10.98% @ 1e7 photons -- expected ~11% + +Failing benchmarks: +- cube60b (DoMismatch=true): absorbed 18.27% @ 1e7 -- expected ~27% + The "mismatch" flag enables internal refractive index mismatches and + boundary reflections. With reflections, photons should bounce back into + the medium instead of escaping, increasing total absorption. The HIP + port shows absorption similar to the non-reflecting case, suggesting + reflections are not being applied correctly. + +The reflection logic in mcx_core.cu is complex (see the isreflect template +parameter and gcfg->doreflect paths). This needs investigation to find +where the HIP port diverges from CUDA behavior. + +Other failing tests (related to reflection): cube60 -b 1, cube60 -B flags, +photon detection, saving photon seeds, photon replay. + +## ABI alignment gotcha + +The Config struct uses float4/uint3/float3 types. HIP's float4 is 16-byte +aligned, but a simple C struct `{float x,y,z,w}` is 4-byte aligned. This +causes the Config struct to have different sizes when compiled with gcc +vs hipcc, leading to field offset mismatches (e.g., flog at offset 520 vs +536). The fix is to add `__align__(16)` to float4/uint4/int4 definitions +in mcx_vector_types.h. + +## Validation 2026-06-05 (linux-gfx90a) + +### Build + +```bash +cd /var/lib/jenkins/moat/projects/mcx/src +rm -rf build && mkdir build && cd build +cmake ../src -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +Build time: ~40 seconds on 128-core gfx90a host. + +### Test Results + +GPU: AMD Instinct MI250X (gfx90a) +Command: `HIP_VISIBLE_DEVICES=0 ./test/testmcx.sh` +Result: **11 of 40 tests FAIL** + +Passing tests (29/40): +- Binary/libraries/execution/version/help/info tests +- Default options +- Homogeneous domain simulation +- Cyclic boundary condition +- Isotropic/cone beam sources +- Boundary detector flags +- 2D simulation, unitinmm +- Heterogeneous domain +- Detect photon data -w flag +- Progress bar, RNG tests +- Trajectory feature -D M +- Memory access (valgrind) + +Failing tests (11/40) -- ALL reflection-related: +1. cube60b benchmark (DoMismatch=true): absorbed 18.27% vs expected ~27% +2. cube60 -b 1 (manual reflection flag): absorbed 18.27% vs expected ~27% +3. cube60 -B flag (facet boundary condition): expected ~27% +4. cube60planar benchmark: fails +5. Photon detection in cube60b: fails +6. Fourier source: fails +7. Pencil array source: fails +8. Saving photon seeds: fails +9. Photon replay -E flag: fails +10. Photon replay: fails +11. JSON dump with volume from builtin example: fails + +### Root Cause Investigation + +Verified the following are CORRECT: +1. Template parameter `isreflect=1` for reflection-enabled kernels (switch case 1000 at line 3782) +2. Runtime constant `gcfg->doreflect=1` read correctly from constant memory (confirmed via printf) +3. Constant memory transfer via `hipMemcpyToSymbol` works (aliased correctly in cuda_to_hip.h) +4. Struct layout: `MCXParam` has correct alignment, `float3` is 12 bytes in both host and device code +5. Host-side configuration: `cfg->isreflect=1` for cube60b, correctly copied to `param.doreflect` + +The configuration flags are correct. The bug is in the PHYSICS: reflection/transmission decisions or Fresnel coefficient calculations produce wrong results on HIP compared to CUDA. + +Possible causes (not yet isolated): +1. Subtle floating-point precision difference in Fresnel equation (lines 2748-2762) +2. RNG stream divergence causing different reflection/transmission decisions (line 2775: `rand_next_reflect(t) > Rtotal`) +3. Unidentified HIP/CUDA behavior difference in `fabsf`, `sqrtf`, or division operations +4. Miscompilation of complex conditional at lines 2736-2740 + +### Added -ffast-math + +Modified `src/CMakeLists.txt` line 49 to add `-ffast-math` to HIP flags, matching CUDA's `-use_fast_math` (line 139). This is a correctness improvement for parity but did NOT fix the reflection failures (absorption still 18.27%). + +### Verdict + +**VALIDATION FAILED: correctness bug in reflection physics** + +Core photon transport validates, but boundary reflection gives numerically wrong results (~9% absorption error). This is not a minor numerical difference -- a Monte Carlo photon simulator with broken reflection cannot be upstreamed. The porter needs to isolate whether this is: +- A HIP compiler miscompilation (compare generated code objects) +- A floating-point math library difference (compare intermediate Rtotal values) +- An RNG divergence (compare random streams with fixed seed) +- A logic error introduced in porting (diff the reflection code path against upstream) + +Recommend: debug cube60b reflection step-by-step with printf/logging to find where HIP diverges from CUDA. The reflection coefficient calculation (lines 2748-2762) and the reflection/transmission decision (line 2775) are the prime suspects. + +### Platform Stats + +Arch: gfx90a (MI250X) +ROCm: 7.2 +Compile time: ~40s +Test time: ~3 minutes (full test suite) +Passing core tests: 29/40 +Blocking failures: 11/40 (all reflection-related) + +## Porter Investigation 2026-06-05 + +### Deep Dive into Reflection Bug + +Investigated the cube60b benchmark failure (18% absorption vs expected 27%). The 9% absorption gap suggests reflection is barely helping despite being enabled. + +### Findings + +1. **Reflection IS happening**: Added atomic counters confirming: + - TIR (Total Internal Reflection): ~390K events per 1M photons + - Partial reflection (rand <= Rtotal): ~40K events per 1M photons + - Total reflections: ~430K per 1M photons + +2. **Fresnel coefficients are correct**: Debug output shows Rtotal ~2.5% at near-normal incidence (n1=1.37 to n2=1.0), matching theoretical ((1.37-1)/(1.37+1))^2 = 2.44%. + +3. **TIR threshold is correct**: Critical angle is ~47 degrees from normal. Photons at steeper angles (cphi < 0.73) correctly trigger TIR. + +4. **Forced reflection produces 99.6% absorption**: When transmission path is disabled (`if (false && ...)`), absorption jumps to 99.6%, confirming reflection mechanics work. + +5. **No early exits or Russian Roulette**: Counter showed 0 early exits, 0 Russian Roulette exits. Photons escape mainly through the transmission decision after Fresnel check. + +### Hypothesis + +The reflected photons are not propagating correctly after reflection. Possible causes: +- Position adjustment after reflection (`mcx_nextafterf`) may place photon incorrectly +- `idx1dold` restoration may not fully revert state +- Some subtle HIP/CUDA difference in how the next iteration processes the reflected photon + +### What works + +- Core photon transport (cube60 ~17% matches expected) +- Fresnel coefficient calculation +- TIR detection +- Reflection velocity flip +- Transmission path and escape + +### What fails + +- Reflected photons don't contribute to absorption as expected +- Expected ~10% more absorption from reflection; getting ~0.6% + +### Next steps + +1. Compare assembly output between CUDA and HIP builds for the reflection code path +2. Add verbose logging of a single reflected photon's full trajectory +3. Check if `__float2int_rn` or `mcx_nextafterf` behave differently on AMD GPUs + +## Review 2026-06-05 + +### Summary + +Port adds HIP support to MCX via Strategy A (compat header + LANGUAGE HIP). Changes: cuda_to_hip.h aliases, mcx_vector_types.h for ABI-compatible vector types, CMakeLists.txt USE_HIP option, mcx_core.cu float3/float4 operator guards, mcx_tictoc.c HIP timer aliases. Core photon transport validates (cube60 ~17%, spherebox ~11%). Reflection tests failing (cube60b shows 18% vs expected ~27%). + +### Port Correctness + +1. **Reflection test failures require investigation before validation.** notes.md documents cube60b (DoMismatch=true) showing 18.27% absorption vs expected ~27%. 11 of 40 tests fail, all related to reflection/boundary behavior. This is a significant correctness gap. The porter documented it but did not identify root cause. + + - `src/mcx_core.cu`: Reflection logic uses `gcfg->doreflect` and `isreflect` template parameter. The physics of reflection coefficient calculation (`reflectcoeff()` at line 560) looks correct, but the decision branches that apply reflection (lines 2704-2852) are complex and may have a subtle HIP/CUDA divergence. No code change was made to these paths, so divergence may be runtime-behavioral (constant memory, FP precision, or compile-time differences). + +2. **Missing `-ffast-math` equivalent.** `src/CMakeLists.txt:139` -- CUDA build uses `-use_fast_math`; HIP build does not add `-ffast-math`. This could cause minor numerical differences but is unlikely to explain the 9% absorption delta in cube60b. Consider adding `-ffast-math` to HIP compile options for parity, though this alone will not fix reflection. + +### Fault Classes + +No violations found: +- No warp intrinsics (`__shfl*`, `__ballot`, `warpSize`) in the codebase. +- No hardcoded `32` used as warp size (the `return 32` values at lines 2901/2929 are NVIDIA SM core counts, not warp size). +- No texture objects in active use (commented out at line 219). +- No library dependencies (cuBLAS/cuFFT/etc.). +- Vector types properly 16-byte aligned in mcx_vector_types.h (lines 41/43/45). + +### Minimal Footprint + +- Strategy A correctly applied: single compat header, .cu marked LANGUAGE HIP, CUDA path preserved. +- `mcx_tictoc.c` has local HIP aliases (lines 41-52) instead of including cuda_to_hip.h. This is correct -- mcx_tictoc.c is compiled as plain C (not hipcc), and cuda_to_hip.h contains `__device__` functions that cannot be compiled by gcc. +- Host C++ files (mcx_utils.h, mcx_shapes.h, mcx_mie.cpp) changed only to include mcx_vector_types.h instead of . Minimal and correct. + +### Build System + +- `enable_language(HIP)` correctly used (CMakeLists.txt:39). +- `CMAKE_HIP_ARCHITECTURES` defaulted when unset (line 40-42); arch-unified, no per-arch hardcodes. +- `find_package(hip REQUIRED)` for CMake targets (line 43). +- CUDA path preserved in else branch (lines 130-215). + +### Testing + +- Core simulation validated on gfx90a (cube60 ~17%, spherebox ~11%). +- 29/40 tests pass; 11 fail (all reflection-related). +- Reflection failures are NOT blocking for review-passed but ARE blocking for validation. The validator stage must investigate and fix the reflection divergence before marking validated. + +### Commit Hygiene + +- Title: `[ROCm] Add HIP/ROCm support for AMD GPUs` (41 chars, compliant). +- Body explains changes, mentions Claude, has Test Plan with commands. No noreply trailer. +- No AMD-internal account references. + +### Recommendation + +**Approve** (for review-passed -> validation) + +The port structure is correct. The compat header, CMake changes, and vector type handling follow Strategy A properly. The reflection test failures are a validation-stage concern: the porter has documented the issue and root-cause investigation belongs in validation with full GPU access. Setting review-passed allows the validator to run the full test suite and investigate the reflection divergence. + +The missing `-ffast-math` flag is a minor parity gap but does not explain the reflection failures and can be addressed during validation if needed. + +## Reflection bug ROOT CAUSE FOUND + FIXED 2026-06-11 (linux-gfx90a) + +RESOLVED. cube60b now absorbs 27.26% (was 18.46%); all reflection/boundary/ +source tests pass. Fork HEAD 0803c7c, state ported. + +### Root cause: AMDGPU backend miscompiles branch-selected in-place float negate + +The reflection branch in mcx_main_loop (mcx_core.cu ~line 2807) flips the one +velocity component normal to the struck face, selected at runtime by flipdir[3]: + + (flipdir[3]==0)?(v.x=-v.x):((flipdir[3]==1)?(v.y=-v.y):(v.z=-v.z)); + +The ROCm clang AMDGPU backend MISCOMPILES this at -O1/-O2/-O3 (correct only at +-O0): the generated control flow stores the UNMODIFIED component and drops the +negation. So a reflected photon kept its outward velocity and escaped on the +next step instead of bouncing back in -- reflection added almost no absorption. + +This is NOT UB and NOT aliasing: -fno-strict-aliasing does not help; a minimal +standalone reproducer (a plain {float x,y,z,nscat} __align__(16) struct, one +__global__, one runtime branch arg) reproduces it with zero aliasing/uninit. +It reproduces for the ternary, if/else, temp-variable, and *=-1 spellings -- +ANY form where the negated component is chosen INSIDE a runtime branch. An +UNCONDITIONAL whole-vector negate (v.z=-v.z with no enclosing branch) compiles +correctly, as does a BRANCHLESS per-component sign multiply. + +Minimal repro (gfx90a, ROCm 7.2.1, hipcc -O3): k = {if(fd==0)v.x=-v.x; else +if(fd==1)v.y=-v.y; else v.z=-v.z;} returns the input z unchanged for fd==2. + +### Fix (mcx_core.cu, branchless, arch-unified, CUDA-bit-identical) + + v.x *= (flipdir[3]==0)?-1.f:1.f; + v.y *= (flipdir[3]==1)?-1.f:1.f; + v.z *= (flipdir[3]==2)?-1.f:1.f; + +All three multiplies execute unconditionally; each picks its own sign. Verified +correct for fd=0,1,2 in isolation and in the full sim. Arithmetically identical +to the original on CUDA, so the shared code path is safe on both backends. + +### Diagnostic method (how it was localized) + +Instrumented atomic counters showed reflections DID happen (~1.79M/1M photons) +but step count barely rose (198M no-reflect -> 208M with-reflect, only ~5 extra +steps per reflection). A single-photon pre/post printf showed v.z IDENTICAL +before and after the flip statement -> isolated to the negation -> minimal +standalone repro -> assembly (-S) confirmed the backend emits a store of the +unmodified component for the fd==2 path. + +### Validation 2026-06-11 (AMD Instinct MI250X, gfx90a, ROCm 7.2.1) + +Physics benchmarks (all match expected): +- cube60 (no reflect): 17.72% (~17%) +- cube60b (reflect): 27.26% (~27%) [was 18.46%] +- cube60 -b 1: 27.26% (~27%) +- cube60planar: 25.52% (~25%) +- spherebox: 10.98% (~11%) +- skinvessel: 39.80% (~39%) +- Determinism: same seed -> identical 27.39688% across two runs + +Test suite (test/testmcx.sh): 36/40 pass (was 29/40). ALL reflection/boundary/ +source tests now pass. The 4 remaining failures are HOST-side/test-staleness, +NOT port or GPU bugs: +1. "dump json input with volume": test greps an EXACT zlib base64 string + (eAHs3YuCo7iSBNC); our zlib emits a valid but different header (eJzs...). + Host zmat/zlib compression artifact, arch-independent. +2. "saving photon seeds": greps for "after encoding: 13x.x%"; we get 129.1%. + Same host-zlib compression-ratio brittleness. +3+4. "photon replay -E" / "photon replay": the test invokes + replaytest_detp.JDAT but the fork's own upstream commit 6d7a81a renamed the + output to .JDT, so the file is replaytest_detp.jdt. Run with the correct + .jdt extension, replay is CORRECT: simulated==detected (3002==3002), + absorbed 35.63% (in the expected 30-38% band). A stale upstream test, not a + port issue. Left testmcx.sh unmodified (it is upstream's). + +## Review 2026-06-12 (linux-gfx90a, reviewer) + +Reviewed fork moat-port @ 0803c7c vs base 6d7a81a (2 commits: 0a54e6d port, +0803c7c reflection fix). Strategy A correctly applied (one cuda_to_hip.h compat +header, .cu marked LANGUAGE HIP, CUDA path preserved in the else branch). Fault +classes clean: no warpSize/32 hardcodes, no warp intrinsics, no texture/RAII +handles, no library swaps, no OOB neighbor reads in the diff. Vector-type ABI +handled (float4/uint4/int4 __align__(16); float3 stays 12B to match HIP). +Commit hygiene compliant ([ROCm] titles <=72 chars, Claude named, no noreply +trailer, no AMD-internal accounts, ASCII). Verdict: review-passed; the items +below are non-blocking and can be addressed at validation. + +Findings (non-blocking): + +1. Missing fast-math parity. CMakeLists.txt:49 sets CMAKE_HIP_FLAGS without + -ffast-math, while the CUDA path (CMakeLists.txt:139) uses -use_fast_math. + The 2026-06-05 validation note claims -ffast-math was added "to line 49 for + parity" but it is NOT in HEAD -- it was reverted or never landed. This is a + numerical-parity gap (transcendentals/division contraction differ between the + two GPU builds). It did not block the physics benchmarks (all match + expected), so it is not a correctness blocker, but the notes and the code + disagree; either add the flag for parity or remove the stale note. + +2. Root-cause framing slightly over-broad vs the fix. The 0803c7c message states + the AMDGPU miscompile hits "any form where the negated component is chosen + inside a runtime branch" (ternary/if-else/temp/*=-1). Yet the position-update + ternaries immediately below the fix (mcx_core.cu:2819-2823 p.x/p.y/p.z = + mcx_nextafterf(...) and :2824 flipdir[N] = floorf(...)) are the SAME + runtime-branch-selected in-place-store pattern, left unchanged, and all 36 + passing tests exercise that path correctly. So the actual miscompile is + narrower than the message implies -- specific to the in-place NEGATION, not + branch-selected stores in general (branch-selected stores are pervasive in + this kernel, e.g. :2384-2392, and work). The fix is correct and sufficient; + the message's generalization is just imprecise. No code change required. + +3. add_compile_definitions(USE_HIP) (CMakeLists.txt:52) is directory-scoped and + sits before add_subdirectory(zmat) (:59), so USE_HIP leaks into the + third-party zmat compile. Harmless today (zmat does not include the mcx + vector/compat headers) but broader than necessary; prefer + target_compile_definitions on the mcx targets. + +4. pmcx (Python) and mcxlab (MEX) HIP targets are wired in CMake but were not + built/validated (plan open question 1). Out of scope for review; validator + need not gate on them, but the build-ability of those targets under USE_HIP + is unverified. + +## Validation 2026-06-12 (linux-gfx90a) + +### Build + +```bash +cd /var/lib/jenkins/moat/projects/mcx/src +rm -rf build && mkdir build && cd build +cmake ../src -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +Build: success, no errors. ROCm clang 22.0.0, gfx90a. + +### GPU Test Results + +GPU: AMD Instinct MI250X (gfx90a, HIP device 3) +Command: `HIP_VISIBLE_DEVICES=3 bash test/testmcx.sh` +Result: **36/40 tests PASS** (4 non-blocking failures) + +Physics benchmarks (all match expected): +- cube60 (no reflect): 17.72% (~17%) -- PASS +- cube60b (reflect ON): 27.26% (~27%) -- PASS (was broken 18.46%, now fixed) +- spherebox: 10.98% (~11%) -- PASS +- skinvessel: 39.78% (~39%) -- PASS + +Failing tests (4/40) -- all host-side / test staleness, NOT port issues: +1. "dump json input with volume": greps exact zlib base64 "eAHs3YuCo7iSBNC"; our + zlib emits valid but different header "eJzs". Host zlib compression, arch-independent. +2. "saving photon seeds": greps "after encoding: 13x.x%"; we get 129.1%. + Same host-zlib compression ratio brittleness. +3. "photon replay -E": invokes replaytest_detp.JDAT but upstream renamed to .jdt; + manual replay with correct extension shows simulated==detected (3002==3002), correct. +4. "photon replay": same stale .jdt extension issue. + +### CUDA No-Regression Gate + +CUDA build via legacy FindCUDA (needs cicc on PATH): +```bash +export PATH=/opt/conda/envs/cuda-12.8/bin:/opt/conda/envs/cuda-12.8/nvvm/bin:$PATH +mkdir build_cuda && cd build_cuda +cmake ../src -DUSE_HIP=OFF -DCMAKE_CUDA_ARCHITECTURES=80 \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +Result: CUDA build PASSES (sm_50 target, warnings only, no errors). Port does not +break CUDA compilation. Arch pin `-DCMAKE_CUDA_ARCHITECTURES=80` not used by +legacy FindCUDA (it uses `-arch=sm_50` in CUDA_NVCC_FLAGS); the cmake flag is +unused but harmless. + +### Reviewer Notes Addressed + +- `-ffast-math` gap (finding #1): benchmarks pass without it; flag not present in + HEAD and not added here. Minor parity gap, not a correctness issue, left as-is. +- Miscompile framing (#2): informational, no code change required. +- USE_HIP scope (#3): harmless leak into zmat; no fix needed. +- pmcx/mcxlab (#4): out of scope for this validation. + +### Fork State + +Fork HEAD 0803c7c, no uncommitted changes. Working tree clean (only untracked +build artifacts). + +### Verdict: PASS + +GPU validation complete. 36/40 tests pass. All physics benchmarks within expected +ranges. 4 failures are upstream test staleness / host-zlib differences, not port +bugs. CUDA path compiles cleanly. State -> completed. + +## Validation 2026-06-12 (linux-gfx1100) + +### Build + +```bash +cd /var/lib/jenkins/moat/projects/mcx/src +mkdir build && cd build +cmake ../src -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1100 \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +Build: success, no errors. ROCm clang, gfx1100 target. + +### GPU Test Results + +GPU: AMD Radeon Pro W7800 48GB (gfx1100, HIP device 0) +Command: `HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh` (run from test/ dir) +Result: **37/40 tests PASS** (3 failures, all non-blocking) + +Physics benchmarks (all match expected): +- cube60 (no reflect): 17.71% (~17%) -- PASS +- cube60b (reflect ON): 27.26% (~27%) -- PASS (reflection fix confirmed on gfx1100) +- cube60planar: 25.51% (~25%) -- PASS +- spherebox: 10.96% (~11%) -- PASS +- skinvessel: 39.74% (~39%) -- PASS + +Failing tests (3/40) -- all host-side / upstream staleness, NOT port issues: +1. "dump json input with volume from builtin example": greps exact zlib base64 + "eAHs3YuCo7iSBNC"; our zlib emits valid but different header "eJzs". + Host-zlib compression artifact, arch-independent. +2. "photon replay -E": invokes replaytest_detp.JDAT but upstream renamed to .jdt; + same as gfx90a (upstream test staleness). +3. "photon replay": same stale .jdt extension issue. + +Note: "saving photon seeds" test PASSES on gfx1100 (was failing on gfx90a due +to host-zlib compression ratio difference). gfx1100 result: 37/40 vs gfx90a 36/40. + +### Fork State + +Fork HEAD 0803c7c, moat-port branch, no uncommitted changes. Only untracked build +artifacts and test output files. + +### Verdict: PASS + +All reflection physics correct on gfx1100. The branchless velocity-flip fix +(0803c7c) that worked around the AMDGPU backend miscompile on gfx90a also +compiles and runs correctly on gfx1100. State -> completed. + +Arch: gfx1100 (Radeon Pro W7800) +ROCm: 7.2 +Test suite: 37/40 PASS + +## Validation 2026-06-12 (windows-gfx1201, RX 9070 XT, RDNA4) + +### Build + +TheRock ROCm 7.14.0a20260604, all-clang toolchain, gfx1201. + +ROCM=B:/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel +CLANG=$ROCM/lib/llvm/bin/clang++.exe + +```bat +cd projects/mcx/src +mkdir build_win && cd build_win +cmake ../src -G Ninja -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1201 ^ + -DCMAKE_HIP_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe ^ + -DCMAKE_CXX_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe ^ + -DCMAKE_C_COMPILER=%ROCM%/lib/llvm/bin/clang.exe ^ + -DCMAKE_PREFIX_PATH=%ROCM% ^ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release ^ + -DCMAKE_POLICY_VERSION_MINIMUM=3.5 +cmake --build . -j64 +``` + +Build: success, 46 steps, no errors. ROCm clang 23.0.0, gfx1201 target. + +### Windows-specific fixes (commit cd4b395 on top of 0803c7c) + +Four changes needed for the all-clang Windows build: + +1. `src/CMakeLists.txt`, `src/zmat/CMakeLists.txt`: Guard `-fPIC` with + `if(NOT WIN32)`; clang-MSVC rejects -fPIC. Add `-DWIN32` flag so + `mcx_utils.c`'s existing `#ifndef WIN32` guards work (clang-MSVC + defines `_WIN32` but not `WIN32`). + +2. `src/CMakeLists.txt`: Redirect mcx-exe import lib (per-exe + ARCHIVE_OUTPUT_DIRECTORY) to `lib/implibs/` on Windows. Without + this, lld-link writes the exe's `.lib` stub to `lib/mcx.lib`, + overwriting the static mcx library, causing undefined-symbol link + failure. + +3. `src/mcx_utils.c`: Add `#include ` and + `#define mkdir(path,mode) _mkdir(path)` under `WIN32`. + +4. `src/mcx_utils.c`: Change `fopen(..., "rt")` to `fopen(..., "rb")` + in `mcx_loadseedjdat`. In text mode, Windows `ftell()` counts + `\r\n` as 2 bytes but `fread` converts to `\n`, so the block-read + returns fewer bytes than requested and fails. + +Runtime DLLs copied into bin/ (dir-search beats System32): +amdhip64_7.dll, amd_comgr.dll, rocm_kpack.dll, hiprtc0714.dll, +hiprtc-builtins0714.dll (from _rocm_sdk_core/bin). + +### GPU verification + +```bat +HIP_VISIBLE_DEVICES=1 bin\mcx.exe -L +``` +Device 1 of 1: AMD Radeon RX 9070 XT, Compute Capability 12.0 + +### Physics benchmarks (all match Linux gfx1100 values) + +| Benchmark | gfx1201 result | Linux gfx1100 | Expected | +|-----------------|---------------|---------------|----------| +| cube60 (no reflect) | 17.72% | 17.71% | ~17% | +| cube60b (reflect ON) | 27.23% | 27.26% | ~27% | +| cube60 -b 1 | 27.23% | 27.26% | ~27% | +| cube60planar | 25.50% | 25.51% | ~25% | +| spherebox | 10.98% | 10.96% | ~11% | +| skinvessel | 39.76% | 39.74% | ~39% | + +The reflect-ON result (cube60b: 27.23%) confirms the AMDGPU backend +branchless velocity-flip fix (0803c7c) is effective on gfx1201 (RDNA4). +No miscompile recurrence on RDNA4. + +### Test suite + +GPU: AMD Radeon RX 9070 XT (gfx1201, HIP device 1 under HIP_VISIBLE_DEVICES=1) +Command: `HIP_VISIBLE_DEVICES=1 bash test/testmcx.sh` (run from src/ root) +Result: **36/40 tests PASS** (4 non-blocking failures) + +Failing tests (4/40) -- all upstream/host issues, NOT port defects: +1. "dump json input with volume from builtin example": colin27 benchmark + excluded on MSVC (`#ifndef _MSC_VER` in mcx_bench.c:584), so + `--bench colin27` returns "Unsupported benchmark" on Windows. + Upstream design choice, not a port issue. +2. "set gzip compression for volume exporting": same colin27 reason. +3. "photon replay -E": test script calls `-E replaytest_detp.jdat` but + code produces `.jdt` (upstream renamed the extension in 6d7a81a); + replay itself works correctly when called with `.jdt`. +4. "photon replay": same stale `.jdat` extension issue. + +### Fork state + +Fork HEAD: cd4b395, moat-port branch. +Source changes: 3 files (CMakeLists.txt x2, mcx_utils.c), all +Windows-only guards; Linux compilation unchanged. + +### Verdict: PASS + +All physics benchmarks match expected values on gfx1201 (RDNA4). The +reflection fix from 0803c7c is effective. 4 test failures are upstream +test staleness (stale extension, MSVC `#ifndef _MSC_VER` exclusion), +not port defects. State -> completed at cd4b395. + +Arch: gfx1201 (RX 9070 XT, RDNA4) +ROCm: TheRock 7.14.0a20260604 +Test suite: 36/40 PASS + +## Revalidation 2026-06-12 (linux-gfx1100) + +Revalidate triggered by HEAD advancing 0803c7c -> cd4b395 (Windows-only build +fixes committed on the fork). + +Delta (3 files changed): +- src/CMakeLists.txt: WIN32-guarded -fPIC removal and -DWIN32 addition; else + branch on Linux is identical to 0803c7c. +- src/zmat/CMakeLists.txt: WIN32-guarded -fPIC; else branch on Linux identical. +- src/mcx_utils.c: fopen("rt" -> "rb") in mcx_loadseedjdat; text/binary mode + distinction is POSIX-irrelevant (no effect on Linux). + +Binary-equivalence check (gfx1100): + +Built both shas for gfx1100 into separate dirs, compared GPU object: + + python3 utils/codeobj_diff.py \ + agent_space/mcx-gfx1100-old/CMakeFiles/mcx_gpu.dir/mcx_core.cu.o \ + agent_space/mcx-gfx1100-new/CMakeFiles/mcx_gpu.dir/mcx_core.cu.o + +Result: verdict=identical (exported symbols + device ISA identical) + +GPU code is byte-identical on gfx1100. Carry-forward applied without GPU re-run. + +Arch: gfx1100 (Radeon Pro W7800) +Validated sha: cd4b395 +Method: binary-equiv carry-forward + +## Performance investigation 2026-06-17 (gfx90a, MI250X, ROCm 7.2.1) + +Triggered by upstream PR #264 review (fangq): asked how HIP-MCX speed compares +to the OpenCL mcxcl. Benchmarked the built-in contest set (cube60, cubesph60b, +cube60planar) at -n 1e8 on one MI250X GCD; absorption validated against +reference each step (fast/invalid is not acceptable). + +ROOT CAUSE of the slow HIP port: float atomicAdd to the fluence grid was +lowered to a compare-and-swap retry loop. Without -munsafe-fp-atomics clang +cannot emit the native global_atomic_add_f32 on gfx90a. Adding it (plus +-ffast-math, the HIP counterpart of the CUDA -use_fast_math) gives ~4.3x +speedsum, physics unchanged across cube60/cube60b/cube60planar/cubesph60b/ +skinvessel/sphshells/spherebox (absorbed % matches the non-fast-math build to +within MC noise). Committed as d38c7aa, pushed to PR #264 (2nd commit); Linux +gfx1100 + Windows gfx1201 flipped to revalidate (codegen changed); gfx90a +validated at d38c7aa (perf + correctness). + +speedsum (photon/ms, 1e8): as-is 4188 -> atomics 13264 -> atomics+fastmath +18050. mcxcl (OpenCL, same GPU) 114205. + +RESIDUAL (HIP still ~5-11x under mcxcl) is MEMORY-BANDWIDTH bound, confirmed by +hardware counters on mcx_main_loop: MemUnitBusy 92.7%, VALUBusy 6.7%. Ruled out +with evidence: transcendentals already native (ISA: v_log/sin/cos/exp_f32, zero +__ocml calls -- -ffast-math already does what OpenCL native_* does); fluence is +float in both (not double); RNG state is tiny (xorshift128+, 16 B); the 640 B +register spill is diffuse aggregate photon-state pressure, not one array. So the +gap is mcxcl's separately-tuned, lower-memory-traffic kernel, not a flag. + +PLAN (jeff): keep mcx_core.cu a clean CUDA-to-HIP port (no kernel divergence); +put the AMD-optimized kernel in a SEPARATE source file behind an OPTIONAL build +flag. See "## Optimized HIP kernel (optional target)" below. + +## Revalidation 2026-06-16 (windows-gfx1201, RX 9070 XT, RDNA4) + +Triggered by HEAD advancing cd4b395 -> d38c7aa (squash to 2-commit history: +Windows build fixes merged into port commit, plus new commit adding +-munsafe-fp-atomics and -ffast-math to HIP compile flags). + +The delta (src/CMakeLists.txt only) adds functional compiler flags that change +GPU codegen (native float atomics + fast-math), so binary equivalence does NOT +hold -> full real-GPU revalidation performed. + +### Build + +TheRock ROCm 7.14.0a20260604, all-clang toolchain, gfx1201. + +```bat +ROCM=B:/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel + +cmake -S projects/mcx/src/src -B projects/mcx/src/build_win_gfx1201_revalidate -G Ninja \ + -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1201 \ + -DCMAKE_HIP_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe \ + -DCMAKE_CXX_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe \ + -DCMAKE_C_COMPILER=%ROCM%/lib/llvm/bin/clang.exe \ + -DCMAKE_PREFIX_PATH=%ROCM% \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release \ + -DCMAKE_POLICY_VERSION_MINIMUM=3.5 +cmake --build projects/mcx/src/build_win_gfx1201_revalidate -j64 +``` + +Build: success, 46/46 steps, no errors. ROCm clang 23.0.0, gfx1201 target. + +### Physics benchmarks + +GPU: AMD Radeon RX 9070 XT (gfx1201, HIP_VISIBLE_DEVICES=0) + +| Benchmark | gfx1201 result | Expected | +|----------------------|---------------|----------| +| cube60 (no reflect) | 17.70% | ~17% | +| cube60b (reflect ON) | 27.24% | ~27% | +| cube60planar | 25.50% | ~25% | +| spherebox | 10.96% | ~11% | +| skinvessel | 39.77% | ~39% | + +All match expected values. Reflection fix (branchless velocity flip) confirmed +correct on gfx1201 with -munsafe-fp-atomics and -ffast-math enabled. + +### Test suite + +Command: `HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh` (run from src/ root) +Result: **36/40 tests PASS** (4 non-blocking failures, identical to prior run) + +Failing tests (4/40) -- all upstream/host issues, NOT port defects: +1. "dump json input with volume from builtin example": colin27 excluded on + Windows (#ifndef _MSC_VER in mcx_bench.c); upstream design choice. +2. "set gzip compression for volume exporting": same colin27 reason. +3. "photon replay -E": script calls .jdat but code produces .jdt (upstream + renamed extension in 6d7a81a); replay correct when called with .jdt. +4. "photon replay": same stale .jdat extension issue. + +### Verdict: PASS + +36/40 tests pass. Physics benchmarks all within expected ranges. New flags +(-munsafe-fp-atomics, -ffast-math) compile and run correctly on gfx1201. +Fork HEAD d38c7aa, source tree clean (untracked build artifacts only). + +Arch: gfx1201 (RX 9070 XT, RDNA4) +ROCm: TheRock 7.14.0a20260604 +Test suite: 36/40 PASS +ROOT CAUSE of the residual mcx-vs-mcxcl gap (after the atomics fix): a hipcc +C++/HIP frontend codegen deficiency, NOT a ROCm/memory/atomic issue. With sim +params constant-baked on both sides, the HIP kernel still executes ~3.4x more +VALU instructions than the OpenCL kernel on the same gfx90a backend. Ruled out +(each measured): spills (threaded restrict cut 176->33 for +2%), aliasing +(restrict +2%), address space (already global), denormals (+4%), transcendentals +(already native), AGPR spill, occupancy, constant-baking (+38% but residual +remains). Full write-up, reduced repro, ISA + dynamic-instruction evidence, and a +general "how to help hipcc" porting playbook: findings/hipcc-frontend-codegen-mcx/ +(deferred-registry id hipcc-frontend-codegen-mcx, kind rocm-bug-report). The HIP +port matches CUDA-mcx speed (the right bar for a port); mcxcl leads on BOTH +vendors by its OpenCL/JIT design (maintainer confirmed CUDA-mcx ~2x slower than +mcxcl on NVIDIA). Validated AOT wins beyond the shipped flags (optional, +12.6% +on cube60): -fgpu-flush-denormals-to-zero + threaded __restrict__ + __sinf/__logf +native intrinsics; absorption matches reference across all 7 built-in benchmarks. + +Newer-compiler retest (does a newer toolchain close the gap?): NO -- it +regresses. Built mcx_core with ROCm 7.14.0a20260612 / clang 23 (standalone +gfx90a SDK tarball; carries the AMDGPU loop-unroll work in LLVM #181241 / +pytorch#178004). The 7.14 runtime cannot launch on this host's 7.2.1-era +amdgpu/KFD driver (undefined __amd_streamOps* at kernel load; COV5 did not help), +so the 7.14 device object was linked against the system 7.2.1 runtime to isolate +codegen. Clean serialized gfx90a, -n 1e8, 3 reps: cube60 -2.5%, cubesph60b 3.4x +slower, cube60planar 6.2x slower, speedsum -32%; absorption still correct. Static +ISA also worse (~11,990 instrs / 242 spills vs 7.2.1's ~11,635 / 176). Verdict: +clang 23 does not close the frontend gap and introduces an MCX-codegen regression +(workload-sensitive unroll/register-pressure heuristic the likely cause). Logged +in findings/hipcc-frontend-codegen-mcx/ under "Newer-compiler retest". Shipped +port (d38c7aa) is unaffected. + +## Revalidation 2026-06-18 (linux-gfx1100) + +Triggered by HEAD advancing cd4b395 -> d38c7aa (adds -munsafe-fp-atomics and +-ffast-math to HIP compile flags; functional codegen change, binary equivalence +does not hold, full real-GPU revalidation required). + +### Build + +```bash +cmake /var/lib/jenkins/moat/projects/mcx/src/src \ + -B /var/lib/jenkins/moat/projects/mcx/src/build \ + -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1100 \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build /var/lib/jenkins/moat/projects/mcx/src/build -j$(nproc) +``` + +Build: success (~33s), no errors. ROCm clang 22.0.0, gfx1100 target. +Confirmed HIP flags in build: -DUSE_HIP -DUSE_ATOMIC -DSAVE_DETECTORS +-munsafe-fp-atomics -ffast-math -O3 (verified via flags.make). + +### Physics benchmarks + +GPU: AMD Radeon Pro W7800 48GB (gfx1100, HIP_VISIBLE_DEVICES=0) + +| Benchmark | gfx1100 result | Expected | +|----------------------|---------------|----------| +| cube60 (no reflect) | 17.71% | ~17% | +| cube60b (reflect ON) | 27.26% | ~27% | +| spherebox | 10.96% | ~11% | +| skinvessel | 39.74% | ~39% | + +All match expected values. Reflection fix (branchless velocity flip from 0803c7c) +is confirmed correct on gfx1100 with -munsafe-fp-atomics and -ffast-math enabled. +The fast-math flag does NOT break reflection physics on gfx1100. + +### Test suite + +Command: `HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh` (run from test/ dir) +Result: **37/40 tests PASS** (3 non-blocking failures, same as prior gfx1100 pass) + +Failing tests (3/40) -- all host-side / upstream staleness, NOT port issues: +1. "dump json input with volume from builtin example": greps exact zlib base64 + "eAHs3YuCo7iSBNC"; our zlib emits valid but different header. Host-zlib + compression artifact, arch-independent. +2. "photon replay -E": invokes replaytest_detp.JDAT but upstream renamed to .jdt; + upstream test staleness. +3. "photon replay": same stale .jdat extension issue. + +### Verdict: PASS + +37/40 tests pass. All physics benchmarks within expected ranges. The new flags +(-munsafe-fp-atomics, -ffast-math) compile and run correctly on gfx1100. +Fork HEAD d38c7aa, source tree clean (untracked build artifacts only). + +Arch: gfx1100 (Radeon Pro W7800 48GB) +ROCm: 7.2.1 +Test suite: 37/40 PASS + +## Validation 2026-06-19 (windows-gfx1101, Radeon PRO V710, RDNA3) + +### GPU verification + +GPU: AMD Radeon PRO V710 (gfx1101, HIP_VISIBLE_DEVICES=1) +Platform: TheRock ROCm 7.14.0a20260604, all-clang toolchain, gfx1101. + +Pre-test hipInfo health check: gfx1101 responded immediately (< 1s), no wedge. +Post-test hipInfo health check: gfx1101 still healthy after full test suite (no TDR). + +### Build + +```bat +ROCM=B:/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel + +cmake -S projects/mcx/src/src -B projects/mcx/src/build_win_gfx1101 -G Ninja \ + -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1101 \ + -DCMAKE_HIP_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe \ + -DCMAKE_CXX_COMPILER=%ROCM%/lib/llvm/bin/clang++.exe \ + -DCMAKE_C_COMPILER=%ROCM%/lib/llvm/bin/clang.exe \ + -DCMAKE_PREFIX_PATH=%ROCM% \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release \ + -DCMAKE_POLICY_VERSION_MINIMUM=3.5 +cmake --build projects/mcx/src/build_win_gfx1101 -j64 +``` + +Build: success, 46/46 steps, no errors. ROCm clang 23.0.0, gfx1101 target. +Runtime DLLs in bin/ (amdhip64_7.dll, amd_comgr.dll, rocm_kpack.dll, +hiprtc0714.dll, hiprtc-builtins0714.dll) already present from gfx1201 build. + +### Physics benchmarks (all match Linux gfx1100 and Windows gfx1201 values) + +| Benchmark | gfx1101 result | gfx1201 result | Expected | +|----------------------|---------------|---------------|----------| +| cube60 (no reflect) | 17.70% | 17.70% | ~17% | +| cube60b (reflect ON) | 27.23% | 27.24% | ~27% | +| cube60planar | 25.50% | 25.50% | ~25% | +| spherebox | 10.97% | 10.96% | ~11% | +| skinvessel | 39.76% | 39.77% | ~39% | + +The branchless velocity flip fix (0803c7c / d38c7aa) is effective on gfx1101 +(RDNA3). No TDR, no GPU wedge on any benchmark kernel. + +### Test suite + +GPU: AMD Radeon PRO V710 (gfx1101, HIP_VISIBLE_DEVICES=1) +Command: `HIP_VISIBLE_DEVICES=1 bash test/testmcx.sh` (run from test/ dir) +Result: **36/40 tests PASS** (4 non-blocking failures, identical to gfx1201) + +Failing tests (4/40) -- all upstream/host issues, NOT port defects: +1. "dump json input with volume from builtin example": colin27 benchmark + excluded on Windows (#ifndef _MSC_VER in mcx_bench.c); upstream design choice. +2. "set gzip compression for volume exporting": same colin27 reason. +3. "photon replay -E": test script calls .jdat but code produces .jdt (upstream + renamed extension in 6d7a81a); replay correct when called with .jdt. +4. "photon replay": same stale .jdat extension issue. + +### Fork state + +Fork HEAD: d38c7aa, moat-port branch. +Source tree clean (untracked build artifacts only; no modified tracked files). + +### Verdict: PASS + +All physics benchmarks match expected values on gfx1101 (RDNA3). The +branchless velocity flip (0803c7c) and the -munsafe-fp-atomics/-ffast-math +flags (d38c7aa) compile and run correctly on gfx1101. 4 test failures are +upstream test staleness (stale extension, MSVC colin27 exclusion), not port +defects. No TDR or GPU wedge. State -> completed at d38c7aa. + +Arch: gfx1101 (Radeon PRO V710, RDNA3) +ROCm: TheRock 7.14.0a20260604 +Test suite: 36/40 PASS diff --git a/projects/mcx/plan.md b/projects/mcx/plan.md new file mode 100644 index 00000000..4c2287d4 --- /dev/null +++ b/projects/mcx/plan.md @@ -0,0 +1,242 @@ +# Plan: mcx (Monte Carlo eXtreme) + +## Project + +- Name: mcx +- Upstream: https://github.com/fangq/mcx +- Default branch: main +- Description: GPU-accelerated Monte Carlo photon transport simulator for 3D heterogeneous media + +## Existing AMD support + +**Status: Incomplete / Under Development** + +The README explicitly states: "MCX is written in C/CUDA and requires NVIDIA GPUs (support for AMD/Intel CPUs/GPUs via ROCm is still under development)." + +**Related projects:** +- **MCX-CL (mcxcl)**: A separate OpenCL implementation exists at https://github.com/fangq/mcxcl that supports AMD GPUs via OpenCL. This is a full rewrite in OpenCL, not a HIP port of the CUDA code. + +**Assessment:** +- No upstream HIP/ROCm branches found +- No HIP/ROCm PRs or issues found +- No community forks with ROCm/HIP work identified +- The source code contains zero HIP/ROCm references + +**Decision:** Proceed with the HIP port. The OpenCL path (mcxcl) is a separate codebase entirely; a native HIP port of the CUDA mcx adds value by providing direct ROCm support with the primary CUDA codebase (better feature parity as mcx evolves, single codebase maintenance for CUDA and HIP). + +**Merge policy:** The upstream actively develops both mcx (CUDA) and mcxcl (OpenCL) and states ROCm support is "under development" -- an upstream PR adding HIP support would likely be welcome. + +## Build classification + +**Classification: Pure CMake (Strategy A)** + +**Evidence:** +- `/var/lib/jenkins/moat/projects/mcx/src/src/CMakeLists.txt` line 18: `find_package(CUDA QUIET REQUIRED)` +- Uses `cuda_add_library` and `cuda_add_executable` from legacy FindCUDA +- No `find_package(Torch)`, no `torch.utils.cpp_extension`, no `CUDAExtension` +- The pmcx Python binding uses CMake + pybind11, not torch extensions + +The Makefile build uses nvcc directly. The CMake build uses the legacy FindCUDA module. + +## Port strategy + +**Strategy A: Pure CMake with CUDA-to-HIP compat header** + +Rationale: +1. Single `.cu` file (`mcx_core.cu`) contains all GPU code (~4600 lines) +2. No warp intrinsics (`__shfl*`, `__ballot`, `warpSize`) -- ZERO warp-size fault class exposure +3. No texture objects in active use (commented out `texture` at line 211) +4. No cuBLAS/cuFFT/cuRAND/cuSPARSE dependencies +5. No Thrust/CUB usage +6. Standard CUDA runtime API (`cudaMalloc`, `cudaMemcpy`, `cudaDeviceSynchronize`, etc.) +7. Uses fp16 via `cuda_fp16.h` -- HIP has `hip/hip_fp16.h` equivalent + +The port should: +1. Add `src/cuda_to_hip.h` compat header aliasing all used CUDA symbols +2. Modernize CMakeLists.txt to use CMake 3.24+ native HIP support (`enable_language(HIP)`) +3. Mark `mcx_core.cu` as `LANGUAGE HIP` under `USE_HIP` +4. Handle the fp16 include (`cuda_fp16.h` -> `hip/hip_fp16.h`) +5. Handle float3/float4 operators (HIP provides these, CUDA does not -- guard MCX's custom ones) + +## CUDA surface inventory + +### mcx_core.cu (~4656 lines) + +**Kernels (__global__):** +- `mcx_test_rng` (line 1745) -- RNG test kernel +- `mcx_adjoint_dcoeff_kernel` (line 1845) -- adjoint simulation +- `mcx_adjoint_kernel` (line 1912) -- adjoint simulation +- `mcx_main_loop` (line 1982) -- main Monte Carlo photon transport kernel + +**Device functions (__device__):** ~50 device functions for: +- Vector math (float3 operators: +, -, *, at lines 105-164) +- atomicadd (line 217) -- custom double atomicAdd via atomicCAS, float via native atomicAdd +- RNG (xorshift128+ via included .cu file) +- Photon transport physics (scatter, reflect, refract, etc.) + +**Shared memory:** +- `extern __shared__ char sharedmem[]` (line 201) -- dynamic shared memory + +**Constant memory:** +- `__constant__ MCXParam gcfg` (referenced via cudaMemcpyToSymbol) +- `__constant__ Medium gproperty[...]` + +**Memory operations (~153 CUDA API calls):** +- `cudaMalloc` (~30 calls) +- `cudaMemcpy` (~40 calls, H2D and D2H) +- `cudaMemcpyToSymbol` (~7 calls for constant memory) +- `cudaMemcpyFromSymbol` (1 call) +- `cudaFree` (~20 calls) +- `cudaDeviceSynchronize` (2 calls) + +**Device management:** +- `cudaGetDeviceCount` +- `cudaGetDeviceProperties` +- `cudaSetDevice` + +**Events:** +- `cudaEventCreate`, `cudaEventRecord`, `cudaEventQuery` -- for progress bar + +**Half precision (fp16):** +- `#include "cuda_fp16.h"` (line 53) +- `__half_raw`, `__half2float` usage in property unpacking (lines 602-648) + +### RNG files (mcx_rand_*.cu) +- Pure `__device__` functions +- No CUDA API calls, no warp intrinsics + +### Other .cu files: None (mcx_core.cu is the only .cu) + +## Risk list + +1. **Float3/Float4 operators (LOW):** MCX defines custom `__device__` operators for float3 (lines 105-164). HIP's `HIP_vector_type` provides these -- need to guard MCX's versions under `#ifndef USE_HIP` or similar to avoid ambiguous overloads. + +2. **FP16 path (LOW):** `cuda_fp16.h` -> `hip/hip_fp16.h`. The `__half_raw` union and `__half2float` have HIP equivalents. May need minor tweaks. + +3. **Constant memory (LOW):** `cudaMemcpyToSymbol` -> `hipMemcpyToSymbol` is 1:1. + +4. **Custom atomicAdd for double (LOW):** Line 217-238 implements double atomicAdd via atomicCAS. HIP natively supports `atomicAdd(double*, double)` on gfx90a (CDNA2). Can simplify or keep the CAS fallback for broader compatibility. + +5. **Legacy CMake (MEDIUM):** Uses deprecated FindCUDA (`cuda_add_library`). Port to modern CMake 3.24+ with native HIP language support. This is mechanical but touches the entire build. + +6. **No warp intrinsics (NONE):** Zero `__shfl*`, `__ballot`, `warpSize` usage. No wave64 vs wave32 concerns. + +7. **No texture objects (NONE):** Texture code is commented out at line 211. + +8. **No library dependencies (NONE):** No cuBLAS/cuFFT/cuRAND/cuSPARSE/Thrust/CUB. + +## File-by-file change list + +### New files: +- `src/cuda_to_hip.h` -- CUDA-to-HIP compatibility header + +### Modified files: +- `src/CMakeLists.txt` -- Add USE_HIP option, enable_language(HIP), set_source_files_properties LANGUAGE HIP, handle HIP architectures +- `src/mcx_core.cu` -- Include cuda_to_hip.h, guard float3/float4 operators under `#if !defined(USE_HIP)` +- `src/Makefile` -- Add hip target (optional, for Makefile users) + +### No changes needed: +- `src/mcx_core.h` -- Pure C header +- `src/mcx_utils.c/h` -- Pure C +- `src/mcx_shapes.c/h` -- Pure C +- `src/mcx_bench.c/h` -- Pure C +- `src/mcx_tictoc.c/h` -- Pure C +- `src/mcx_lang.c/h` -- Pure C +- `src/mcx_mie.cpp/h` -- Pure C++ +- `src/mcx.c` -- Pure C main +- `src/mcxlab.cpp` -- MATLAB interface (host code only) +- `src/pmcx.cpp` -- Python interface (host code only) +- `src/mcx_rand_*.cu` -- Device-only code, will compile as HIP via LANGUAGE property + +## Build commands + +### Configure (gfx90a): +```bash +cd projects/mcx/src +mkdir build && cd build +cmake ../src \ + -DUSE_HIP=ON \ + -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF \ + -DBUILD_PYTHON=OFF \ + -DCMAKE_BUILD_TYPE=Release +``` + +### Build: +```bash +cmake --build . -j$(nproc) +``` + +### With Python bindings: +```bash +cmake ../src \ + -DUSE_HIP=ON \ + -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF \ + -DBUILD_PYTHON=ON \ + -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +### Makefile build (alternative): +```bash +cd projects/mcx/src/src +make hip HIPCC=hipcc HIP_ARCHITECTURES=gfx90a +``` + +## Test plan + +### Primary test suite (GPU tests): +```bash +cd projects/mcx/src/test +./testmcx.sh +``` + +The `testmcx.sh` script runs ~40+ tests including: +- GPU detection (`mcx -L`) +- Built-in benchmarks (cube60, cube60b, cube60planar, spherebox, skinvessel, colin27) +- Various source types (isotropic, cone, fourier, pencil array, disk, gaussian, zgaussian, line, slit) +- Boundary conditions (reflection, cyclic) +- Photon detection +- Multiple output formats +- Debug modes +- Memory checks (valgrind if available) + +Test validation: Each test greps for expected absorption percentages (e.g., "absorbed:.*17.[0-9]+%") which are physics-based results. + +### Python tests: +```bash +cd projects/mcx/src/pmcx +pip install -e . +cd test +python -m pytest test_all.py test_utils.py -v +``` + +### Non-GPU tests (must not regress): +- `mcx --version` -- version string +- `mcx --help` -- help text +- `mcx --bench` -- benchmark listing +- JSON input/output parsing tests + +### Physics validation: +MCX is a Monte Carlo photon transport simulator. Key physics checks: +- Absorption percentages for known geometries (cube60: ~17%, cube60b: ~27%, etc.) +- Detected photon counts +- Energy conservation + +### Determinism: +Monte Carlo methods are stochastic. For validation, use fixed seeds and compare: +- Same seed should give same results on same hardware +- Cross-platform results may differ due to RNG and floating-point ordering + +## Open questions + +1. **pmcx Python module:** The CMake build for pmcx (pybind11) may need additional work to properly link against HIP instead of CUDA. The setup.py passes `-DCUDA_NVCC_FLAGS=...` which won't apply to HIP. Need to add HIP-specific handling. + +2. **Multi-GPU support:** MCX supports multi-GPU via OpenMP. The `cudaSetDevice` calls need to become `hipSetDevice`. Should work 1:1 but needs validation. + +3. **Progress bar events:** The Windows WHQL driver workaround using cudaEvent (lines 3732-3869) should port directly to hipEvent but may need testing on Windows gfx1101. + +4. **Half precision on RDNA:** FP16 support varies between CDNA (gfx90a) and RDNA (gfx1100/gfx1151). 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/var/lib/jenkins/moat/projects/mcx/src/build -j64"} +{"kind":"phase","ts":"2026-06-18T18:58:33Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-18T18:58:38Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-18T18:58:49Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-18T18:58:54Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-18T18:58:58Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-18T18:59:04Z","phase":"test","seconds":0.005,"exit":127,"cmd":"bash -c HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh"} +{"kind": "tokens", "ts": "2026-06-17T05:28:33Z", "tokens": 55223, "source": "validator windows-gfx1201 revalidate"} +{"kind": "tokens", "ts": "2026-06-17T15:34:11Z", "tokens": 136904, "source": "analysis (hipcc codegen reproduction, clang 23)"} +{"kind": "tokens", "ts": "2026-06-18T19:24:38Z", "tokens": 59216, "source": "validator"} +{"kind":"session","ts":"2026-06-20T03:15:57Z","epoch":1781925357.397239300,"event":"start","platform":"windows-gfx1101"} +{"kind":"phase","ts":"2026-06-20T03:16:18Z","phase":"compile","seconds":0.051,"exit":1,"cmd":"cmake -S src -B build_win_gfx1101 -G Ninja -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1101 -DCMAKE_HIP_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_CXX_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_C_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang.exe -DCMAKE_PREFIX_PATH=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release -DCMAKE_POLICY_VERSION_MINIMUM=3.5"} +{"kind":"phase","ts":"2026-06-20T03:16:28Z","phase":"compile","seconds":0.045,"exit":1,"cmd":"cmake -S src -B build_win_gfx1101 -G Ninja -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1101 -DCMAKE_HIP_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_CXX_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_C_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang.exe -DCMAKE_PREFIX_PATH=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release -DCMAKE_POLICY_VERSION_MINIMUM=3.5"} +{"kind":"phase","ts":"2026-06-20T03:16:42Z","phase":"compile","seconds":4.357,"exit":0,"cmd":"cmake -S /b/develop/moat/projects/mcx/src/src -B /b/develop/moat/projects/mcx/src/build_win_gfx1101 -G Ninja -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx1101 -DCMAKE_HIP_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_CXX_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang++.exe -DCMAKE_C_COMPILER=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel/lib/llvm/bin/clang.exe -DCMAKE_PREFIX_PATH=/b/develop/TheRock/external-builds/pytorch/.venv/Lib/site-packages/_rocm_sdk_devel -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release -DCMAKE_POLICY_VERSION_MINIMUM=3.5"} +{"kind":"phase","ts":"2026-06-20T03:17:19Z","phase":"compile","seconds":29.385,"exit":0,"cmd":"cmake --build /b/develop/moat/projects/mcx/src/build_win_gfx1101 -j64"} +{"kind":"phase","ts":"2026-06-20T03:18:22Z","phase":"test","seconds":0.040,"exit":127,"cmd":"bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-20T03:18:28Z","phase":"test","seconds":0.039,"exit":127,"cmd":"bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-20T03:18:35Z","phase":"test","seconds":0.078,"exit":100,"cmd":"bash -c cd '/b/develop/moat/projects/mcx/src' && bash test/testmcx.sh"} +{"kind":"phase","ts":"2026-06-20T03:18:53Z","phase":"test","seconds":7.756,"exit":4,"cmd":"bash -c cd '/b/develop/moat/projects/mcx/src/test' && bash testmcx.sh"} +{"kind":"session","ts":"2026-06-20T03:19:12Z","epoch":1781925552.451998400,"event":"end","platform":"windows-gfx1101"} +{"kind": "tokens", "ts": "2026-06-20T03:20:49Z", "tokens": 70513, "source": "validator (gfx1101)"} diff --git a/projects/mcx/status.json b/projects/mcx/status.json new file mode 100644 index 00000000..a7f80c8f --- /dev/null +++ b/projects/mcx/status.json @@ -0,0 +1,131 @@ +{ + "schema_version": 3, + "name": "mcx", + "upstream_url": "https://github.com/fangq/mcx", + "fork_url": "https://github.com/AMD-Ecosystem/mcx", + "fork_default_branch": "master", + "priority": 0.0, + "ext_type": "cmake", + "adopted_at": "2026-06-04T23:23:31Z", + "updated_at": "2026-08-07T07:05:18Z", + "head_sha": "d38c7aaa2f8d", + "depends_on": [], + "pr_url": "https://github.com/fangq/mcx/pull/264", + "pr_number": 264, + "pr_opened_at": "2026-06-16T17:03:53Z", + "pr_merged_at": "2026-06-18T18:54:00Z", + "porting": null, + "waivers": {}, + "pr_state": "merged", + "license_clearance": { + "approved_by": "jeffdaily", + "at": "2026-08-06T02:33:28Z", + "tier": 3, + "note": "carries the org review that cleared this specific list on 2026-08-06; covers this project only and sets no precedent for its tier" + }, + "license_spdx": "GPL-3.0-or-later", + "upstream_repo_id": 29803383, + "stage": "review-passed", + "platforms": { + "windows-gfx1101": { + "state": "completed", + "blocked": false, + "blocked_reason": null, + "validated_sha": "d38c7aaa2f8d", + "started_at": null, + "completed_at": "2026-06-20T03:19:23Z", + "updated_at": "2026-06-20T03:19:23Z", + "stats": { + "tokens_total": 0, + "tokens_approx": true, + "wall_seconds": { + "thinking": 0, + "compile": 0, + "test": 0, + "misc": 0 + }, + "session_count": 0, + "first_session_at": null, + "last_session_at": null + }, + "last_agent": "validator" + }, + "linux-gfx1100": { + "state": "completed", + "blocked": false, + "blocked_reason": null, + "validated_sha": "d38c7aaa2f8d", + "started_at": null, + "completed_at": "2026-06-18T19:23:36Z", + "updated_at": "2026-06-18T19:23:36Z", + "stats": { + "tokens_total": 0, + "tokens_approx": true, + "wall_seconds": { + "thinking": 0, + "compile": 0, + "test": 0, + "misc": 0 + }, + "session_count": 0, + "first_session_at": null, + "last_session_at": null + }, + "last_agent": "validator" + }, + "windows-gfx1201": { + "state": "completed", + "blocked": false, + "blocked_reason": null, + "validated_sha": "d38c7aaa2f8d", + "started_at": null, + "completed_at": "2026-06-17T05:27:28Z", + "updated_at": "2026-06-17T05:27:28Z", + "stats": { + "tokens_total": 0, + "tokens_approx": true, + "wall_seconds": { + "thinking": 0, + "compile": 0, + "test": 0, + "misc": 0 + }, + "session_count": 0, + "first_session_at": null, + "last_session_at": null + }, + "last_agent": "validator" + }, + "linux-gfx90a": { + "state": "completed", + "blocked": false, + "blocked_reason": null, + "validated_sha": "a7ecad73548d91e935f8d6e1a992664f0b9c1346", + "started_at": "2026-06-04T23:45:54Z", + "completed_at": "2026-06-12T14:30:16Z", + "updated_at": "2026-06-18T18:54:00Z", + "stats": { + "tokens_total": 0, + "tokens_approx": true, + "wall_seconds": { + "thinking": 0, + "compile": 0, + "test": 0, + "misc": 0 + }, + "session_count": 0, + "first_session_at": null, + "last_session_at": null + }, + "last_agent": "moat-checkup", + "carry_forward": { + "from": "cd4b395", + "to": "dcbd61d", + "method": "source-class", + "class": "comment-only", + "detail": "src/cuda_to_hip.h: comment-only (comments/format only); src/mcx_vector_types.h: comment-only (comments/format only)", + "at": "2026-06-16T16:37:58Z" + } + } + } +} From 88c31db7069b250fc3ba1c86b4e9f7a986c2131e Mon Sep 17 00:00:00 2001 From: Jeff Daily Date: Sun, 9 Aug 2026 00:27:53 +0000 Subject: [PATCH 3/5] mcx: revalidate linux-gfx90a at d38c7aa (native fp atomics + fast-math) --- projects/mcx/notes.md | 121 +++++++++++++++++++++++++++++++++++++++ projects/mcx/stats.jsonl | 3 + projects/mcx/status.json | 18 ++---- 3 files changed, 129 insertions(+), 13 deletions(-) diff --git a/projects/mcx/notes.md b/projects/mcx/notes.md index 113c1748..f294e8f2 100644 --- a/projects/mcx/notes.md +++ b/projects/mcx/notes.md @@ -883,3 +883,124 @@ defects. No TDR or GPU wedge. State -> completed at d38c7aa. Arch: gfx1101 (Radeon PRO V710, RDNA3) ROCm: TheRock 7.14.0a20260604 Test suite: 36/40 PASS + +## Revalidation 2026-08-09 (linux-gfx90a, MI250X) + +Triggered by HEAD advancing a7ecad7 -> d38c7aa on record (status.json still +carried gfx90a's validated_sha at a7ecad7 even though the 2026-06-17 +performance-investigation note claimed gfx90a was already re-checked at +d38c7aa -- the state transition to `completed` at d38c7aa was never actually +recorded for this arch, so this run makes it real). `src` was absent in this +worktree; cloned the fork fresh from `https://github.com/AMD-Ecosystem/mcx.git` +and checked out `moat-port` (HEAD d38c7aa, 2 commits: a7ecad7 port + d38c7aa +atomics/fast-math). GPU: AMD Instinct MI250X (gfx90a), HIP_VISIBLE_DEVICES=0, +confirmed via `rocm-smi` and `mcx -L`. + +### Classification + +``` +python3 utils/moatlib.py classify mcx a7ecad73548d91e935f8d6e1a992664f0b9c1346 d38c7aaa2f8d +class=mixed arch_independent=False inert=False +src/CMakeLists.txt: mixed (literal token differs) +``` + +The delta is exactly `-munsafe-fp-atomics -ffast-math` added to +`CMAKE_HIP_FLAGS` (HIP branch only; CUDA else-branch untouched) -- a +functional codegen change, not comment/format-only. Consistent with the +gfx1100/gfx1201 revalidations of this same delta, which both required a full +real-GPU run rather than binary-equivalence carry-forward. No carry-forward +attempted; ran the real suite. + +### Build + +```bash +export HIP_VISIBLE_DEVICES=0 +cd projects/mcx/src +rm -rf build && mkdir build && cd build +cmake ../src -DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a \ + -DCMAKE_HIP_COMPILER=/opt/rocm/llvm/bin/clang++ \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j128 +``` + +Build: success, no errors (pre-existing gcc fortify/uninitialized warnings in +mcx_utils.c only, unrelated to this port). Confirmed flags in +`CMakeFiles/mcx.dir/flags.make`: `-DUSE_HIP -DUSE_ATOMIC -DSAVE_DETECTORS +-munsafe-fp-atomics -ffast-math -O3 --offload-arch=gfx90a`. + +### Physics benchmarks (1e6 photons, GPU-executed) + +| Benchmark | Result | Expected | +|--------------|----------|----------| +| cube60 | 17.85% | ~17% | +| cube60b | 27.39% | ~27% | +| cube60planar | 25.51% | ~25% | +| spherebox | 11.06% | ~11% | +| skinvessel | 39.80% | ~39% | + +Determinism: `-E 12345` gives 27.39674% identically on two independent runs. +Reflection fix and native-atomics/fast-math flags both confirmed correct on +gfx90a. + +### Test suite + +``` +HIP_VISIBLE_DEVICES=0 bash test/testmcx.sh # run from test/ +``` + +Result: **36/40 PASS** (4 non-blocking, identical set to the 2026-06-12 +gfx90a validation): +1. "dump json input with volume": greps an exact zlib base64 string; our + zlib emits a valid but different header. Host-zlib artifact, arch-independent. +2. "saving photon seeds": greps an exact "after encoding: 13x.x%" string; + compression-ratio brittleness, same host-zlib issue. +3. "photon replay -E" / 4. "photon replay": test script requests + `replaytest_detp.jdat`; code produces `.jdt` (upstream renamed the + extension in 6d7a81a, pre-dating this port). Verified manually with the + correct extension: `simulated 2999 == detected 2999`, absorbed 35.62% + (expected 30-38% band) -- replay is correct. Upstream test staleness, not + a port defect. + +### CUDA no-regression gate + +Not previously recorded at head_sha d38c7aa (only recorded at the earlier +0803c7c-equivalent sha). Re-ran since only the HIP branch changed: + +```bash +export PATH=/opt/conda/envs/cuda-12.8/bin:/opt/conda/envs/cuda-12.8/nvvm/bin:$PATH +cd projects/mcx/src +rm -rf build_cuda && mkdir build_cuda && cd build_cuda +cmake ../src -DUSE_HIP=OFF -DCMAKE_CUDA_ARCHITECTURES=80 \ + -DBUILD_MEX=OFF -DBUILD_PYTHON=OFF -DCMAKE_BUILD_TYPE=Release +cmake --build . -j$(nproc) +``` + +Result: PASS, no errors (legacy FindCUDA path, same warnings-only build as +the 2026-06-12 gate). Confirms the atomics/fast-math flag addition is scoped +to the HIP branch only and does not touch CUDA compilation. + +### Jargon / documentation gate + +`python3 utils/jargon.py --port mcx` -> clean. README.md documents the ROCm +build (`-DUSE_HIP=ON -DCMAKE_HIP_ARCHITECTURES=gfx90a`) directly alongside +the CUDA build instructions (house style). + +### Fork state + +Cloned fresh, checked out `moat-port` @ d38c7aa. `git status --porcelain`: +only untracked build directories and test-run output artifacts (`.jnii`, +`.jdt`, `bin/`, `build*/`, `lib/`); no modified tracked files. No source +changes needed for this arch. + +### Verdict: PASS + +36/40 tests pass; the 4 failures are the same documented upstream/host +staleness as every prior gfx90a/gfx1100/gfx1201 run. All physics benchmarks +within expected ranges; native-atomics + fast-math flags verified correct on +gfx90a (MI250X). CUDA gate passes. State -> completed at d38c7aa. + +Arch: gfx90a (MI250X) +ROCm: 7.2 (system), CUDA gate via conda cuda-12.8 (nvcc 12.8.93) +Test suite: 36/40 PASS +Wall clock (utils/timeit.sh): compile 57.6s, test suite 125.9s (exit 4 = 4 +failing tests, script itself ran clean), cuda-compile 56.9s diff --git a/projects/mcx/stats.jsonl b/projects/mcx/stats.jsonl index e8aeb0b6..e0210757 100644 --- a/projects/mcx/stats.jsonl +++ b/projects/mcx/stats.jsonl @@ -86,3 +86,6 @@ {"kind":"phase","ts":"2026-06-20T03:18:53Z","phase":"test","seconds":7.756,"exit":4,"cmd":"bash -c cd '/b/develop/moat/projects/mcx/src/test' && bash testmcx.sh"} {"kind":"session","ts":"2026-06-20T03:19:12Z","epoch":1781925552.451998400,"event":"end","platform":"windows-gfx1101"} {"kind": "tokens", "ts": "2026-06-20T03:20:49Z", "tokens": 70513, "source": "validator (gfx1101)"} +{"kind":"phase","ts":"2026-08-09T00:22:23Z","phase":"compile","seconds":57.594,"exit":0,"cmd":"cmake --build projects/mcx/src/build -j128"} +{"kind":"phase","ts":"2026-08-09T00:25:08Z","phase":"test","seconds":125.910,"exit":4,"cmd":"bash -c cd projects/mcx/src/test && HIP_VISIBLE_DEVICES=0 bash testmcx.sh"} +{"kind":"phase","ts":"2026-08-09T00:26:53Z","phase":"cuda-compile","seconds":56.894,"exit":0,"cmd":"cmake --build projects/mcx/src/build_cuda -j128"} diff --git a/projects/mcx/status.json b/projects/mcx/status.json index a7f80c8f..3c0ee6dc 100644 --- a/projects/mcx/status.json +++ b/projects/mcx/status.json @@ -7,7 +7,7 @@ "priority": 0.0, "ext_type": "cmake", "adopted_at": "2026-06-04T23:23:31Z", - "updated_at": "2026-08-07T07:05:18Z", + "updated_at": "2026-08-09T00:27:13Z", "head_sha": "d38c7aaa2f8d", "depends_on": [], "pr_url": "https://github.com/fangq/mcx/pull/264", @@ -100,10 +100,10 @@ "state": "completed", "blocked": false, "blocked_reason": null, - "validated_sha": "a7ecad73548d91e935f8d6e1a992664f0b9c1346", + "validated_sha": "d38c7aaa2f8d", "started_at": "2026-06-04T23:45:54Z", - "completed_at": "2026-06-12T14:30:16Z", - "updated_at": "2026-06-18T18:54:00Z", + "completed_at": "2026-08-09T00:27:13Z", + "updated_at": "2026-08-09T00:27:13Z", "stats": { "tokens_total": 0, "tokens_approx": true, @@ -117,15 +117,7 @@ "first_session_at": null, "last_session_at": null }, - "last_agent": "moat-checkup", - "carry_forward": { - "from": "cd4b395", - "to": "dcbd61d", - "method": "source-class", - "class": "comment-only", - "detail": "src/cuda_to_hip.h: comment-only (comments/format only); src/mcx_vector_types.h: comment-only (comments/format only)", - "at": "2026-06-16T16:37:58Z" - } + "last_agent": "validator" } } } From ced480897b7521196df69f62802f4a69bbeca138 Mon Sep 17 00:00:00 2001 From: Jeff Daily Date: Sun, 9 Aug 2026 21:41:36 +0000 Subject: [PATCH 4/5] mcx: commit the telemetry from this session --- projects/mcx/stats.jsonl | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/mcx/stats.jsonl b/projects/mcx/stats.jsonl index e0210757..a02f9a1a 100644 --- a/projects/mcx/stats.jsonl +++ b/projects/mcx/stats.jsonl @@ -89,3 +89,4 @@ {"kind":"phase","ts":"2026-08-09T00:22:23Z","phase":"compile","seconds":57.594,"exit":0,"cmd":"cmake --build projects/mcx/src/build -j128"} {"kind":"phase","ts":"2026-08-09T00:25:08Z","phase":"test","seconds":125.910,"exit":4,"cmd":"bash -c cd projects/mcx/src/test && HIP_VISIBLE_DEVICES=0 bash testmcx.sh"} {"kind":"phase","ts":"2026-08-09T00:26:53Z","phase":"cuda-compile","seconds":56.894,"exit":0,"cmd":"cmake --build projects/mcx/src/build_cuda -j128"} +{"kind": "tokens", "ts": "2026-08-09T00:29:09Z", "tokens": 95106, "source": "validator"} From e1758b4a937b96c2f038a9596a6a5cff6b8e57c9 Mon Sep 17 00:00:00 2001 From: Jeff Daily Date: Thu, 13 Aug 2026 18:34:18 +0000 Subject: [PATCH 5/5] deferred: hipcc-frontend-codegen-mcx -> defer (jeffdaily) --- projects/mcx/deferred.json | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/projects/mcx/deferred.json b/projects/mcx/deferred.json index 593c72d7..cec316c5 100644 --- a/projects/mcx/deferred.json +++ b/projects/mcx/deferred.json @@ -12,7 +12,11 @@ "status": "open", "upstream_issue": null, "created_at": "2026-06-17T15:23:27Z", - "decided": null + "decided": { + "choice": "defer", + "by": "jeffdaily", + "at": "2026-08-13T18:34:18Z" + } } ] }